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Re: [Qemu-devel] [PATCH v4 3/9] x86_iommu/amd: remove V=1 check from amd

From: Singh, Brijesh
Subject: Re: [Qemu-devel] [PATCH v4 3/9] x86_iommu/amd: remove V=1 check from amdvi_validate_dte()
Date: Fri, 28 Sep 2018 12:34:42 +0000

On 9/28/18 12:46 AM, Peter Xu wrote:
> On Thu, Sep 27, 2018 at 04:45:55PM +0000, Singh, Brijesh wrote:
>> Currently, the amdvi_validate_dte() assumes that a valid DTE will
>> always have V=1. This is not true. The V=1 means that bit[127:1] are
>> valid. A valid DTE can have IV=1 and V=0 (i.e address translation
>> disabled and interrupt remapping enabled)
>> Remove the V=1 check from amdvi_validate_dte(), make the caller
>> responsible to check for V or IV bits.
>> Signed-off-by: Brijesh Singh <address@hidden>
>> Cc: Peter Xu <address@hidden>
>> Cc: "Michael S. Tsirkin" <address@hidden>
>> Cc: Paolo Bonzini <address@hidden>
>> Cc: Richard Henderson <address@hidden>
>> Cc: Eduardo Habkost <address@hidden>
>> Cc: Marcel Apfelbaum <address@hidden>
>> Cc: Tom Lendacky <address@hidden>
>> Cc: Suravee Suthikulpanit <address@hidden>
> Maybe also mentioning:
>       This also fixes a bug in existing code that when error is
>       detected during the translation we'll fail the translation
>       instead of assuming a passthrough mode.
> Not sure whether this can be done by maintainer.  Anyways:

Based on your other feedback I will do v5 today hence I will take care
of adding the comment in the commit message.

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