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[Qemu-devel] [PATCH v2 0/4] mips: Allow more 'Chip specific instructions

From: Philippe Mathieu-Daudé
Subject: [Qemu-devel] [PATCH v2 0/4] mips: Allow more 'Chip specific instructions' flags
Date: Sun, 30 Sep 2018 21:56:51 +0200

After noticing Fredrik patch [1] clashes with an ongoing work, I shared my
concerns after the current limitations of CPUMIPSState::insn_flags, having
1 bit left to store more 'Chip specific instructions'.

Since v1: https://lists.gnu.org/archive/html/qemu-devel/2018-09/msg00933.html

- update "int insn_flags;" in target/mips/translate.c::DisasContext
- cleaned the 'insn_flags' namespace per Aleksandar suggestion
- drop cpu defs used once
- add my email in MAINTAINERS:MIPS to help me catch patches to review



[1] http://lists.nongnu.org/archive/html/qemu-devel/2018-07/msg01978.html
[2] http://lists.nongnu.org/archive/html/qemu-devel/2018-09/msg00901.html

Based-on: address@hidden

Philippe Mathieu-Daudé (4):
  target/mips: Increase the 'supported instructions' flags holder size
  target/mips: Remove definitions that are only used once
  target/mips: Clean the 'insn_flags' namespace
  MAINTAINERS: Voluntary to review hobbyist MIPS contributions

 target/mips/cpu.h                |  2 +-
 target/mips/internal.h           |  2 +-
 target/mips/mips-defs.h          | 92 ++++++++++++++++++--------------
 target/mips/translate.c          |  8 +--
 target/mips/translate_init.inc.c |  8 +--
 MAINTAINERS                      |  2 +
 6 files changed, 64 insertions(+), 50 deletions(-)


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