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[Qemu-devel] [PATCH v2 08/12] net: cadence_gem: Announce 64bit addressin
From: |
Edgar E. Iglesias |
Subject: |
[Qemu-devel] [PATCH v2 08/12] net: cadence_gem: Announce 64bit addressing support |
Date: |
Thu, 11 Oct 2018 04:19:27 +0200 |
From: "Edgar E. Iglesias" <address@hidden>
Announce 64bit addressing support.
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
---
hw/net/cadence_gem.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index 550225c15b..7f96de4aff 100644
--- a/hw/net/cadence_gem.c
+++ b/hw/net/cadence_gem.c
@@ -142,6 +142,7 @@
#define GEM_DESCONF4 (0x0000028C/4)
#define GEM_DESCONF5 (0x00000290/4)
#define GEM_DESCONF6 (0x00000294/4)
+#define GEM_DESCONF6_64B_MASK (1U << 23)
#define GEM_DESCONF7 (0x00000298/4)
#define GEM_INT_Q1_STATUS (0x00000400 / 4)
@@ -1300,7 +1301,7 @@ static void gem_reset(DeviceState *d)
s->regs[GEM_DESCONF] = 0x02500111;
s->regs[GEM_DESCONF2] = 0x2ab13fff;
s->regs[GEM_DESCONF5] = 0x002f2045;
- s->regs[GEM_DESCONF6] = 0x0;
+ s->regs[GEM_DESCONF6] = GEM_DESCONF6_64B_MASK;
queues_mask = MAKE_64BIT_MASK(1, s->num_priority_queues - 1);
s->regs[GEM_DESCONF6] |= queues_mask;
--
2.17.1
- [Qemu-devel] [PATCH v2 01/12] net: cadence_gem: Disable TSU feature bit, (continued)
- [Qemu-devel] [PATCH v2 01/12] net: cadence_gem: Disable TSU feature bit, Edgar E. Iglesias, 2018/10/10
- [Qemu-devel] [PATCH v2 02/12] net: cadence_gem: Announce availability of priority queues, Edgar E. Iglesias, 2018/10/10
- [Qemu-devel] [PATCH v2 03/12] net: cadence_gem: Use uint32_t for 32bit descriptor words, Edgar E. Iglesias, 2018/10/10
- [Qemu-devel] [PATCH v2 05/12] net: cadence_gem: Add support for extended descriptors, Edgar E. Iglesias, 2018/10/10
- [Qemu-devel] [PATCH v2 04/12] net: cadence_gem: Add macro with max number of descriptor words, Edgar E. Iglesias, 2018/10/10
- [Qemu-devel] [PATCH v2 06/12] net: cadence_gem: Add support for selecting the DMA MemoryRegion, Edgar E. Iglesias, 2018/10/10
- [Qemu-devel] [PATCH v2 09/12] target-arm: powerctl: Enable HVC when starting CPUs to EL2, Edgar E. Iglesias, 2018/10/10
- [Qemu-devel] [PATCH v2 08/12] net: cadence_gem: Announce 64bit addressing support,
Edgar E. Iglesias <=
- [Qemu-devel] [PATCH v2 10/12] target/arm: Add the Cortex-A72, Edgar E. Iglesias, 2018/10/10
- [Qemu-devel] [PATCH v2 07/12] net: cadence_gem: Implement support for 64bit descriptor addresses, Edgar E. Iglesias, 2018/10/10
- [Qemu-devel] [PATCH v2 11/12] hw/arm: versal: Add a model of Xilinx Versal SoC, Edgar E. Iglesias, 2018/10/10
- [Qemu-devel] [PATCH v2 12/12] hw/arm: versal: Add a virtual Xilinx Versal board, Edgar E. Iglesias, 2018/10/10
- Re: [Qemu-devel] [PATCH v2 00/12] arm: Add first models of Xilinx Versal SoC, Peter Maydell, 2018/10/16