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Re: [Qemu-devel] [PATCH v6 05/14] target/arm: Reorganize PMCCNTR accesse
From: |
Aaron Lindsay |
Subject: |
Re: [Qemu-devel] [PATCH v6 05/14] target/arm: Reorganize PMCCNTR accesses |
Date: |
Mon, 15 Oct 2018 16:29:07 -0400 |
User-agent: |
Mutt/1.10.1 (2018-07-13) |
On Oct 15 12:50, Richard Henderson wrote:
> On 10/10/18 1:37 PM, Aaron Lindsay wrote:
> > pmccntr_read and pmccntr_write contained duplicate code that was already
> > being handled by pmccntr_sync. Consolidate the duplicated code into two
> > functions: pmccntr_op_start and pmccntr_op_finish. Add a companion to
> > c15_ccnt in CPUARMState so that we can simultaneously save both the
> > architectural register value and the last underlying cycle count - this
> > ensures time isn't lost and will also allow us to access the 'old'
> > architectural register value in order to detect overflows in later
> > patches.
> >
> > Signed-off-by: Aaron Lindsay <address@hidden>
> > ---
> > target/arm/cpu.h | 26 ++++++++----
> > target/arm/helper.c | 96 +++++++++++++++++++++++---------------------
> > target/arm/machine.c | 8 ++--
> > 3 files changed, 73 insertions(+), 57 deletions(-)
>
> Ok, looking at this follow-up makes more sense than the previous patch. Would
> it make sense to squash these two together?
I was attempting to keep the migration plumbing separate from the PMU
implementation details, but I'm not particularly partial to this
staging.
> It also makes sense why you'd need the post_save hook.
Okay. I attempted to describe this in the commit message in a way that
communicated the need for the hook without being overly verbose - but
suggestions in that area are very welcome if you think a different
commit message would help.
-Aaron
- Re: [Qemu-devel] [PATCH v6 03/14] migration: Add post_save function to VMStateDescription, (continued)
[Qemu-devel] [PATCH v6 12/14] target/arm: PMU: Set PMCR.N to 4, Aaron Lindsay, 2018/10/10
- Re: [Qemu-devel] [PATCH v6 12/14] target/arm: PMU: Set PMCR.N to 4, Richard Henderson, 2018/10/16
- Re: [Qemu-devel] [PATCH v6 12/14] target/arm: PMU: Set PMCR.N to 4, Aaron Lindsay, 2018/10/17
- Re: [Qemu-devel] [PATCH v6 12/14] target/arm: PMU: Set PMCR.N to 4, Richard Henderson, 2018/10/17
- Re: [Qemu-devel] [PATCH v6 12/14] target/arm: PMU: Set PMCR.N to 4, Aaron Lindsay, 2018/10/17
- Re: [Qemu-devel] [PATCH v6 12/14] target/arm: PMU: Set PMCR.N to 4, Richard Henderson, 2018/10/17
- Re: [Qemu-devel] [PATCH v6 12/14] target/arm: PMU: Set PMCR.N to 4, Peter Maydell, 2018/10/18
- Re: [Qemu-devel] [PATCH v6 12/14] target/arm: PMU: Set PMCR.N to 4, Aaron Lindsay, 2018/10/18
[Qemu-devel] [PATCH v6 14/14] target/arm: Send interrupts on PMU counter overflow, Aaron Lindsay, 2018/10/10
[Qemu-devel] [PATCH v6 11/14] target/arm: PMU: Add instruction and cycle events, Aaron Lindsay, 2018/10/10