This primarily solves the case for RVC that several insns are
completely different, decode and all, between the two. But it
also means that we need less ifdefing for RV{I,M,A,F,D}.
---
target/riscv/insn_trans/trans_rva.inc.c | 46 +---------------
target/riscv/insn_trans/trans_rvc.inc.c | 71 -------------------------
target/riscv/insn_trans/trans_rvd.inc.c | 26 +--------
target/riscv/insn_trans/trans_rvf.inc.c | 18 +------
target/riscv/insn_trans/trans_rvi.inc.c | 49 +++--------------
target/riscv/insn_trans/trans_rvm.inc.c | 22 +-------
target/riscv/Makefile.objs | 23 ++++++--
target/riscv/insn16-32.decode | 31 +++++++++++
target/riscv/insn16-64.decode | 33 ++++++++++++
target/riscv/insn16.decode | 24 +++------
target/riscv/insn32.decode | 53 +-----------------
target/riscv/insn64.decode | 71 +++++++++++++++++++++++++
12 files changed, 176 insertions(+), 291 deletions(-)
create mode 100644 target/riscv/insn16-32.decode
create mode 100644 target/riscv/insn16-64.decode
create mode 100644 target/riscv/insn64.decode