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[Qemu-devel] [PULL v2 10/33] target/mips: Add a placeholder for R5900 LQ
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PULL v2 10/33] target/mips: Add a placeholder for R5900 LQ |
Date: |
Wed, 24 Oct 2018 15:40:24 +0200 |
From: Fredrik Noring <address@hidden>
Add a placeholder for LQ instruction.
Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Fredrik Noring <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
---
target/mips/translate.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 19a8aba..2318116 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -24420,6 +24420,11 @@ static void decode_opc_special3_legacy(CPUMIPSState
*env, DisasContext *ctx)
}
}
+static void decode_tx79_lq(CPUMIPSState *env, DisasContext *ctx)
+{
+ generate_exception_end(ctx, EXCP_RI); /* TODO: TX79_LQ */
+}
+
static void gen_tx79_sq(DisasContext *ctx, int base, int rt, int offset)
{
generate_exception_end(ctx, EXCP_RI); /* TODO: TX79_SQ */
@@ -26425,8 +26430,12 @@ static void decode_opc(CPUMIPSState *env, DisasContext
*ctx)
}
break;
case OPC_MSA: /* OPC_MDMX */
- /* MDMX: Not implemented. */
- gen_msa(env, ctx);
+ if (ctx->insn_flags & INSN_R5900) {
+ decode_tx79_lq(env, ctx); /* TX79_LQ */
+ } else {
+ /* MDMX: Not implemented. */
+ gen_msa(env, ctx);
+ }
break;
case OPC_PCREL:
check_insn(ctx, ISA_MIPS32R6);
--
2.7.4
- [Qemu-devel] [PULL v2 25/33] tests/tcg/mips: Add tests for R5900 three-operand MULTU1, (continued)
- [Qemu-devel] [PULL v2 25/33] tests/tcg/mips: Add tests for R5900 three-operand MULTU1, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 21/33] target/mips: Make R5900 DMULT[U], DDIV[U], LL[D] and SC[D] user only, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 15/33] target/mips: Add a placeholder for R5900 MMI3 instruction subclass, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 19/33] target/mips: Support R5900 DIV1 and DIVU1 instructions, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 28/33] tests/tcg/mips: Add tests for R5900 DIV1, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 27/33] tests/tcg/mips: Add tests for R5900 MTLO1 and MTHI1, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 32/33] target/mips: Fix the title of translate.c, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 33/33] target/mips: Fix decoding of ALIGN and DALIGN instructions, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 31/33] linux-user/mips: Recognize the R5900 CPU model, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 07/33] target/mips: Define R5900 MMI2 opcode constants, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 10/33] target/mips: Add a placeholder for R5900 LQ,
Aleksandar Markovic <=
- Re: [Qemu-devel] [PULL v2 00/33] MIPS queue for October 2018 - part 2 - v2, Peter Maydell, 2018/10/24