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[Qemu-devel] [PULL 1/5] target/mips: Rename MMI-related masks
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PULL 1/5] target/mips: Rename MMI-related masks |
Date: |
Tue, 30 Oct 2018 18:28:14 +0100 |
From: Aleksandar Markovic <address@hidden>
Rename MMI-related masks.
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Stefan Markovic <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
---
target/mips/translate.c | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 60320cb..5c6f123 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -2201,7 +2201,7 @@ enum {
* 7 111 | * | * | * | * | PSLLW | * | PSRLW | PSRAW
*/
-#define MASK_TX79_MMI(op) (MASK_OP_MAJOR(op) | ((op) & 0x3F))
+#define MASK_MMI(op) (MASK_OP_MAJOR(op) | ((op) & 0x3F))
enum {
TX79_MMI_MADD = 0x00 | TX79_CLASS_MMI, /* Same as OPC_MADD */
TX79_MMI_MADDU = 0x01 | TX79_CLASS_MMI, /* Same as OPC_MADDU */
@@ -2252,7 +2252,7 @@ enum {
* 7 111 | * | * | PEXT5 | PPAC5
*/
-#define MASK_TX79_MMI0(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF))
+#define MASK_MMI0(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF))
enum {
TX79_MMI0_PADDW = (0x00 << 6) | TX79_MMI_CLASS_MMI0,
TX79_MMI0_PSUBW = (0x01 << 6) | TX79_MMI_CLASS_MMI0,
@@ -2303,7 +2303,7 @@ enum {
* 7 111 | * | * | * | *
*/
-#define MASK_TX79_MMI1(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF))
+#define MASK_MMI1(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF))
enum {
TX79_MMI1_PABSW = (0x01 << 6) | TX79_MMI_CLASS_MMI1,
TX79_MMI1_PCEQW = (0x02 << 6) | TX79_MMI_CLASS_MMI1,
@@ -2347,7 +2347,7 @@ enum {
* 7 111 | PMULTH| PDIVBW| PEXEW | PROT3W
*/
-#define MASK_TX79_MMI2(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF))
+#define MASK_MMI2(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF))
enum {
TX79_MMI2_PMADDW = (0x00 << 6) | TX79_MMI_CLASS_MMI2,
TX79_MMI2_PSLLVW = (0x02 << 6) | TX79_MMI_CLASS_MMI2,
@@ -2395,7 +2395,7 @@ enum {
* 7 111 | * | * | PEXCW | *
*/
-#define MASK_TX79_MMI3(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF))
+#define MASK_MMI3(op) (MASK_OP_MAJOR(op) | ((op) & 0x7FF))
enum {
TX79_MMI3_PMADDUW = (0x00 << 6) | TX79_MMI_CLASS_MMI3,
TX79_MMI3_PSRAVW = (0x03 << 6) | TX79_MMI_CLASS_MMI3,
@@ -26338,7 +26338,7 @@ static void decode_opc_special3_legacy(CPUMIPSState
*env, DisasContext *ctx)
static void decode_tx79_mmi0(CPUMIPSState *env, DisasContext *ctx)
{
- uint32_t opc = MASK_TX79_MMI0(ctx->opcode);
+ uint32_t opc = MASK_MMI0(ctx->opcode);
switch (opc) {
case TX79_MMI0_PADDW: /* TODO: TX79_MMI0_PADDW */
@@ -26377,7 +26377,7 @@ static void decode_tx79_mmi0(CPUMIPSState *env,
DisasContext *ctx)
static void decode_tx79_mmi1(CPUMIPSState *env, DisasContext *ctx)
{
- uint32_t opc = MASK_TX79_MMI1(ctx->opcode);
+ uint32_t opc = MASK_MMI1(ctx->opcode);
switch (opc) {
case TX79_MMI1_PABSW: /* TODO: TX79_MMI1_PABSW */
@@ -26409,7 +26409,7 @@ static void decode_tx79_mmi1(CPUMIPSState *env,
DisasContext *ctx)
static void decode_tx79_mmi2(CPUMIPSState *env, DisasContext *ctx)
{
- uint32_t opc = MASK_TX79_MMI2(ctx->opcode);
+ uint32_t opc = MASK_MMI2(ctx->opcode);
switch (opc) {
case TX79_MMI2_PMADDW: /* TODO: TX79_MMI2_PMADDW */
@@ -26445,7 +26445,7 @@ static void decode_tx79_mmi2(CPUMIPSState *env,
DisasContext *ctx)
static void decode_tx79_mmi3(CPUMIPSState *env, DisasContext *ctx)
{
- uint32_t opc = MASK_TX79_MMI3(ctx->opcode);
+ uint32_t opc = MASK_MMI3(ctx->opcode);
switch (opc) {
case TX79_MMI3_PMADDUW: /* TODO: TX79_MMI3_PMADDUW */
@@ -26472,7 +26472,7 @@ static void decode_tx79_mmi3(CPUMIPSState *env,
DisasContext *ctx)
static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx)
{
- uint32_t opc = MASK_TX79_MMI(ctx->opcode);
+ uint32_t opc = MASK_MMI(ctx->opcode);
int rs = extract32(ctx->opcode, 21, 5);
int rt = extract32(ctx->opcode, 16, 5);
int rd = extract32(ctx->opcode, 11, 5);
--
2.7.4
- [Qemu-devel] [PULL 0/5] MIPS queue for October 2018, part 5, Aleksandar Markovic, 2018/10/30
- [Qemu-devel] [PULL 5/5] target/mips: Enable only tested modes for R5900, Aleksandar Markovic, 2018/10/30
- [Qemu-devel] [PULL 1/5] target/mips: Rename MMI-related masks,
Aleksandar Markovic <=
- [Qemu-devel] [PULL 2/5] target/mips: Rename MMI-related opcodes, Aleksandar Markovic, 2018/10/30
- [Qemu-devel] [PULL 4/5] target/mips: Remove some spurious R5900-related comments, Aleksandar Markovic, 2018/10/30
- [Qemu-devel] [PULL 3/5] target/mips: Rename MMI-related functions, Aleksandar Markovic, 2018/10/30
- Re: [Qemu-devel] [PULL 0/5] MIPS queue for October 2018, part 5, Philippe Mathieu-Daudé, 2018/10/30