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[Qemu-devel] [PATCH v2 0/6] Fix decoding mechanisms of the R5900
From: |
Fredrik Noring |
Subject: |
[Qemu-devel] [PATCH v2 0/6] Fix decoding mechanisms of the R5900 |
Date: |
Wed, 7 Nov 2018 20:17:35 +0100 |
User-agent: |
Mutt/1.10.1 (2018-07-13) |
This series amends the R5900 support with the following changes:
- MFLO1, MFHI1, MTLO1 and MTHI1 are generated in gen_HILO1_tx79 instead
of the generic gen_HILO.
- DIV1 and DIVU1 are generated in gen_div1_tx79 instead of the generic
gen_muldiv.
- MOVN, MOVZ, MFHI, MFLO, MTHI, MTLO, MULT, MULTU, DIV, DIVU, DMULT,
DMULTU, DDIV, DDIVU and JR are decoded in decode_opc_special_tx79
instead of the generic decode_opc_special_legacy.
- Guard check_insn_opc_user_only with INSN_R5900 check.
- Guard check_insn with INSN_R5900 check.
- Fix HI[ac] and LO[ac] 32-bit truncation with the MIPS64 DSP ASE.
This series has been successfully built with the 8 different build
configurations
{gcc,clang} x -m64 x mips{,64}el-{linux-user,softmmu}
in addition successfully completing the R5900 test suite
cd tests/tcg/mips/mipsr5900 && make check
Changes in v2:
- Fix HI and LO 32-bit truncation with the MIPS64 DSP ASE
- Decode special R5900 opcodes in decode_opc_special_tx79
- Guard check_insn_opc_user_only with INSN_R5900 check
- Guard check_insn with INSN_R5900 check
Fredrik Noring (6):
target/mips: Fix decoding mechanism of R5900 MFLO1, MFHI1, MTLO1 and MTHI1
target/mips: Fix decoding mechanism of R5900 DIV1 and DIVU1
target/mips: Fix HI[ac] and LO[ac] 32-bit truncation with MIPS64 DSP ASE
target/mips: Fix decoding mechanism of special R5900 opcodes
target/mips: Guard check_insn_opc_user_only with INSN_R5900 check
target/mips: Guard check_insn with INSN_R5900 check
target/mips/translate.c | 229 +++++++++++++++++++++++++++++-----------
1 file changed, 170 insertions(+), 59 deletions(-)
--
2.18.1
- [Qemu-devel] [PATCH v2 0/6] Fix decoding mechanisms of the R5900,
Fredrik Noring <=
- [Qemu-devel] [PATCH v2 1/6] target/mips: Fix decoding mechanism of R5900 MFLO1, MFHI1, MTLO1 and MTHI1, Fredrik Noring, 2018/11/07
- [Qemu-devel] [PATCH v2 2/6] target/mips: Fix decoding mechanism of R5900 DIV1 and DIVU1, Fredrik Noring, 2018/11/07
- [Qemu-devel] [PATCH v2 3/6] target/mips: Fix HI[ac] and LO[ac] 32-bit truncation with MIPS64 DSP ASE, Fredrik Noring, 2018/11/07
- [Qemu-devel] [PATCH v2 4/6] target/mips: Fix decoding mechanism of special R5900 opcodes, Fredrik Noring, 2018/11/07