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Re: [Qemu-devel] [RFC v1 09/23] riscv: tcg-target: Add the immediate enc
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [RFC v1 09/23] riscv: tcg-target: Add the immediate encoders |
Date: |
Fri, 16 Nov 2018 09:26:30 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.3.0 |
On 11/15/18 11:35 PM, Alistair Francis wrote:
> +static int32_t encode_simm12(uint32_t imm)
> +{
> + return ((imm << 20) >> 25) << 25 | ((imm << 27) >> 27) << 7;
> +}
I'm not fond of triple shifts like this, as it makes me count.
I'd be ok with a formulation like
return ((imm & 0x1f) << 7) | ((imm & 0xfe) << (25 - 5));
but perhaps best as
uint32_t ret = 0;
ret = deposit32(ret, imm, 7, 5);
ret = deposit32(ret, imm >> 5, 25, 7);
Similarly with encode_sbimm12, encode_uimm20 (which is a simple &),
encode_ujimm12.
r~
- [Qemu-devel] [RFC v1 05/23] riscv: Add the tcg-target header file, (continued)
- [Qemu-devel] [RFC v1 05/23] riscv: Add the tcg-target header file, Alistair Francis, 2018/11/15
- [Qemu-devel] [RFC v1 06/23] riscv: Add the tcg target registers, Alistair Francis, 2018/11/15
- [Qemu-devel] [RFC v1 07/23] riscv: tcg-target: Regiser the JIT, Alistair Francis, 2018/11/15
- [Qemu-devel] [RFC v1 08/23] riscv: tcg-target: Add support for the constraints, Alistair Francis, 2018/11/15
- [Qemu-devel] [RFC v1 09/23] riscv: tcg-target: Add the immediate encoders, Alistair Francis, 2018/11/15
- Re: [Qemu-devel] [RFC v1 09/23] riscv: tcg-target: Add the immediate encoders,
Richard Henderson <=
- [Qemu-devel] [RFC v1 11/23] riscv: tcg-target: Add the relocation functions, Alistair Francis, 2018/11/15
[Qemu-devel] [RFC v1 10/23] riscv: tcg-target: Add the instruction emitters, Alistair Francis, 2018/11/15
[Qemu-devel] [RFC v1 12/23] riscv: tcg-target: Add the mov and movi instruction, Alistair Francis, 2018/11/15