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Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RS
From: |
Mark Cave-Ayland |
Subject: |
Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR |
Date: |
Thu, 29 Nov 2018 19:33:15 +0000 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.3.0 |
On 29/11/2018 19:00, Guenter Roeck wrote:
>> Thanks for the patch. I just gave it a quick test, and unfortunately my
>> NextSTEP ISO
>> still hangs in the same place on boot :(
>>
> Too bad. Is it "same place" as with the first version of the patch, or
> "same place" as in upstream qemu ? That might be important, as the two patch
> versions behave differently (one caches RSTAT/RINTR/RSEQ, one defers command
> complete handling).
I'd say same place as in upstream QEMU, although again the exact location does
vary
so I have to keep running it several times to get a feel for whether or not it
is in
improvement.
>> Not sure if it helps, but attached is a simple trace backend log from
>> "-trace 'esp*'"
>> from startup all the way to the point where the kernel hangs on boot whilst
>> enumerating the SCSI bus (it does seem to hang at random points in the bus
>> enumeration process).
>>
> This is interesting; yours seems to be a different problem. I don't see any
> command_complete_deferred traces in your log. I also don't see any suspicious
> activity between esp_raise_irq and esp_lower_irq.
>
> Can you try tracing in singlethreaded mode ? Maybe that can help us finding
> the difference.
Attached are the "-trace 'esp*' -trace 'scsi*'" outputs for a bad (normal) boot
and
good (single threaded) boot for comparison.
ATB,
Mark.
trace-bad.txt.xz
Description: application/xz
trace-good.txt.xz
Description: application/xz
- [Qemu-devel] [PATCH 1/2] esp-pci: Fix status register write erase control, Guenter Roeck, 2018/11/28
- [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR, Guenter Roeck, 2018/11/28
- Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR, Paolo Bonzini, 2018/11/29
- Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR, Mark Cave-Ayland, 2018/11/29
- Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR, Guenter Roeck, 2018/11/29
- Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR, Guenter Roeck, 2018/11/29
- Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR, Paolo Bonzini, 2018/11/29
- Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR, Mark Cave-Ayland, 2018/11/29
- Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR, Guenter Roeck, 2018/11/29
- Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR,
Mark Cave-Ayland <=
- Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR, Guenter Roeck, 2018/11/29
- Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR, Mark Cave-Ayland, 2018/11/29
- Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR, Guenter Roeck, 2018/11/29
- Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR, Mark Cave-Ayland, 2018/11/29
- Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR, Guenter Roeck, 2018/11/29
Re: [Qemu-devel] [PATCH 1/2] esp-pci: Fix status register write erase control, Paolo Bonzini, 2018/11/29