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Re: [Qemu-devel] [PATCH 00/12] tcg: Improve register allocation for call
From: |
Emilio G. Cota |
Subject: |
Re: [Qemu-devel] [PATCH 00/12] tcg: Improve register allocation for calls |
Date: |
Fri, 30 Nov 2018 10:56:50 -0500 |
User-agent: |
Mutt/1.9.4 (2018-02-28) |
On Fri, Nov 30, 2018 at 08:15:56 +0100, Laurent Desnogues wrote:
> On Fri, Nov 30, 2018 at 4:00 AM Emilio G. Cota <address@hidden> wrote:
> >
> > On Thu, Nov 29, 2018 at 19:39:15 -0500, Emilio G. Cota wrote:
> > > A64 and POWER9 host numbers:
> > >
> > > https://imgur.com/a/m6Pss99
> > >
> > > There's quite a bit of noise in the P9 measurements, but it's
> > > a shared machine so I can't do much about that.
> > >
> > > I'll update the A64 results with error bars later tonight,
> > > when I get further results.
> >
> > Here they are:
> >
> > https://imgur.com/a/EAAapSW
>
> What is a X-Gene A57? It's either X-Gene or A57 :-)
You're right -- this is an X-Gene (xgene 1).
The A57 reference came from here:
https://www.cloudlab.us/hardware.php
m400 nodes: 45 per chassis, 315 total
Processor/Chipset: Applied Micro X-Gene system-on-chip
Eight 64-bit ARMv8 (Atlas/A57) cores at 2.4 GHz
^^^
I'm not familiar with ARMv8's commercial offerings, so I
just quoted the above--which turns out to be wrong,
since A57 is an ARM design and X-Gene is not.
Thanks,
E.
- [Qemu-devel] [PATCH 12/12] tcg: Record register preferences during liveness, (continued)
- [Qemu-devel] [PATCH 12/12] tcg: Record register preferences during liveness, Richard Henderson, 2018/11/28
- [Qemu-devel] [PATCH 11/12] tcg: Add TCG_OPF_BB_EXIT, Richard Henderson, 2018/11/28
- [Qemu-devel] [PATCH 08/12] tcg: Reindent parts of liveness_pass_1, Richard Henderson, 2018/11/28
- [Qemu-devel] [PATCH 09/12] tcg: Rename and adjust liveness_pass_1 helpers, Richard Henderson, 2018/11/28
- [Qemu-devel] [PATCH 07/12] tcg: Dump register preference info with liveness, Richard Henderson, 2018/11/28
- Re: [Qemu-devel] [PATCH 00/12] tcg: Improve register allocation for calls, Emilio G. Cota, 2018/11/28