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[Qemu-devel] [PULL 02/37] Allow AArch64 processors to boot from a kernel
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 02/37] Allow AArch64 processors to boot from a kernel placed over 4GB |
Date: |
Thu, 13 Dec 2018 14:54:10 +0000 |
From: Ricardo Perez Blanco <address@hidden>
Architecturally, it's possible for an AArch64 machine to have
all of its RAM over the 4GB mark, but our kernel/initrd loading
code in boot.c assumes that the upper half of the addresses
to load these images to is always zero. Write the whole 64 bit
address into the bootloader code fragment, not just the low half.
Note that, currently, none of the existing QEMU machines have
their main memory over 4GBs, so this was not a user-visible bug.
Signed-off-by: Ricardo Perez Blanco <address@hidden>
[PMM: revised commit message and tweaked some long lines]
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/boot.c | 35 ++++++++++++++++++++++-------------
1 file changed, 22 insertions(+), 13 deletions(-)
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index 586baa9b647..94fce128028 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -63,8 +63,10 @@ typedef enum {
FIXUP_TERMINATOR, /* end of insns */
FIXUP_BOARDID, /* overwrite with board ID number */
FIXUP_BOARD_SETUP, /* overwrite with board specific setup code address */
- FIXUP_ARGPTR, /* overwrite with pointer to kernel args */
- FIXUP_ENTRYPOINT, /* overwrite with kernel entry point */
+ FIXUP_ARGPTR_LO, /* overwrite with pointer to kernel args */
+ FIXUP_ARGPTR_HI, /* overwrite with pointer to kernel args (high half) */
+ FIXUP_ENTRYPOINT_LO, /* overwrite with kernel entry point */
+ FIXUP_ENTRYPOINT_HI, /* overwrite with kernel entry point (high half) */
FIXUP_GIC_CPU_IF, /* overwrite with GIC CPU interface address */
FIXUP_BOOTREG, /* overwrite with boot register address */
FIXUP_DSB, /* overwrite with correct DSB insn for cpu */
@@ -83,10 +85,10 @@ static const ARMInsnFixup bootloader_aarch64[] = {
{ 0xaa1f03e3 }, /* mov x3, xzr */
{ 0x58000084 }, /* ldr x4, entry ; Load the lower 32-bits of kernel entry
*/
{ 0xd61f0080 }, /* br x4 ; Jump to the kernel entry point */
- { 0, FIXUP_ARGPTR }, /* arg: .word @DTB Lower 32-bits */
- { 0 }, /* .word @DTB Higher 32-bits */
- { 0, FIXUP_ENTRYPOINT }, /* entry: .word @Kernel Entry Lower 32-bits */
- { 0 }, /* .word @Kernel Entry Higher 32-bits */
+ { 0, FIXUP_ARGPTR_LO }, /* arg: .word @DTB Lower 32-bits */
+ { 0, FIXUP_ARGPTR_HI}, /* .word @DTB Higher 32-bits */
+ { 0, FIXUP_ENTRYPOINT_LO }, /* entry: .word @Kernel Entry Lower 32-bits */
+ { 0, FIXUP_ENTRYPOINT_HI }, /* .word @Kernel Entry Higher 32-bits */
{ 0, FIXUP_TERMINATOR }
};
@@ -106,8 +108,8 @@ static const ARMInsnFixup bootloader[] = {
{ 0xe59f2004 }, /* ldr r2, [pc, #4] */
{ 0xe59ff004 }, /* ldr pc, [pc, #4] */
{ 0, FIXUP_BOARDID },
- { 0, FIXUP_ARGPTR },
- { 0, FIXUP_ENTRYPOINT },
+ { 0, FIXUP_ARGPTR_LO },
+ { 0, FIXUP_ENTRYPOINT_LO },
{ 0, FIXUP_TERMINATOR }
};
@@ -174,8 +176,10 @@ static void write_bootloader(const char *name, hwaddr addr,
break;
case FIXUP_BOARDID:
case FIXUP_BOARD_SETUP:
- case FIXUP_ARGPTR:
- case FIXUP_ENTRYPOINT:
+ case FIXUP_ARGPTR_LO:
+ case FIXUP_ARGPTR_HI:
+ case FIXUP_ENTRYPOINT_LO:
+ case FIXUP_ENTRYPOINT_HI:
case FIXUP_GIC_CPU_IF:
case FIXUP_BOOTREG:
case FIXUP_DSB:
@@ -1152,9 +1156,13 @@ void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info
*info)
/* Place the DTB after the initrd in memory with alignment. */
info->dtb_start = QEMU_ALIGN_UP(info->initrd_start + initrd_size,
align);
- fixupcontext[FIXUP_ARGPTR] = info->dtb_start;
+ fixupcontext[FIXUP_ARGPTR_LO] = info->dtb_start;
+ fixupcontext[FIXUP_ARGPTR_HI] = info->dtb_start >> 32;
} else {
- fixupcontext[FIXUP_ARGPTR] = info->loader_start + KERNEL_ARGS_ADDR;
+ fixupcontext[FIXUP_ARGPTR_LO] =
+ info->loader_start + KERNEL_ARGS_ADDR;
+ fixupcontext[FIXUP_ARGPTR_HI] =
+ (info->loader_start + KERNEL_ARGS_ADDR) >> 32;
if (info->ram_size >= (1ULL << 32)) {
error_report("RAM size must be less than 4GB to boot"
" Linux kernel using ATAGS (try passing a device
tree"
@@ -1162,7 +1170,8 @@ void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info
*info)
exit(1);
}
}
- fixupcontext[FIXUP_ENTRYPOINT] = entry;
+ fixupcontext[FIXUP_ENTRYPOINT_LO] = entry;
+ fixupcontext[FIXUP_ENTRYPOINT_HI] = entry >> 32;
write_bootloader("bootloader", info->loader_start,
primary_loader, fixupcontext, as);
--
2.19.2
- [Qemu-devel] [PULL 00/37] target-arm queue, Peter Maydell, 2018/12/13
- [Qemu-devel] [PULL 03/37] musicpal: Convert sysbus init function to realize function, Peter Maydell, 2018/12/13
- [Qemu-devel] [PULL 05/37] char/grlib_apbuart: Convert sysbus init function to realize function, Peter Maydell, 2018/12/13
- [Qemu-devel] [PULL 04/37] block/noenand: Convert sysbus init function to realize function, Peter Maydell, 2018/12/13
- [Qemu-devel] [PULL 07/37] display/g364fb: Convert sysbus init function to realize function, Peter Maydell, 2018/12/13
- [Qemu-devel] [PULL 08/37] dma/puv3_dma: Convert sysbus init function to realize function, Peter Maydell, 2018/12/13
- [Qemu-devel] [PULL 01/37] hw: arm: musicpal: drop TYPE_WM8750 in object_property_set_link(), Peter Maydell, 2018/12/13
- [Qemu-devel] [PULL 02/37] Allow AArch64 processors to boot from a kernel placed over 4GB,
Peter Maydell <=
- [Qemu-devel] [PULL 06/37] core/empty_slot: Convert sysbus init function to realize function, Peter Maydell, 2018/12/13
- [Qemu-devel] [PULL 10/37] milkymist-softusb: Convert sysbus init function to realize function, Peter Maydell, 2018/12/13
- [Qemu-devel] [PULL 09/37] gpio/puv3_gpio: Convert sysbus init function to realize function, Peter Maydell, 2018/12/13
- [Qemu-devel] [PULL 12/37] intc/puv3_intc: Convert sysbus init function to realize function, Peter Maydell, 2018/12/13
- [Qemu-devel] [PULL 13/37] milkymist-hpdmc: Convert sysbus init function to realize function, Peter Maydell, 2018/12/13
- [Qemu-devel] [PULL 11/37] input/pl050: Convert sysbus init function to realize function, Peter Maydell, 2018/12/13
- [Qemu-devel] [PULL 32/37] target/arm: Tidy scr_write, Peter Maydell, 2018/12/13
- [Qemu-devel] [PULL 31/37] target/arm: Fix HCR_EL2.TGE check in arm_phys_excp_target_el, Peter Maydell, 2018/12/13
- [Qemu-devel] [PULL 30/37] target/arm: Add SCR_EL3 bits up to ARMv8.5, Peter Maydell, 2018/12/13
- [Qemu-devel] [PULL 33/37] target/arm: Implement the ARMv8.1-HPD extension, Peter Maydell, 2018/12/13