Re: [Qemu-devel] [PATCH 4/5 v2] RISC-V: Add debug support for accessing CSRs.

[Richard Henderson]

On 12/29/18 9:10 AM, Jim Wilson wrote:
> Adds a debugger parameter to csr_read_helper and csr_write_helper.  When
> this is true, we disable illegal instruction checks.
> 
> Signed-off-by: Jim Wilson <address@hidden>
> ---
>  linux-user/riscv/signal.c |  5 ++-
>  target/riscv/cpu.h        |  7 +++-
>  target/riscv/cpu_helper.c |  4 +-
>  target/riscv/gdbstub.c    |  4 +-
>  target/riscv/op_helper.c  | 93 
> ++++++++++++++++++++++++++++++++---------------
>  5 files changed, 76 insertions(+), 37 deletions(-)

Reviewed-by: Richard Henderson <address@hidden>


r~