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Re: [Qemu-devel] [PATCH v3] hw/arm/virt-acpi-build: Set COHACC override
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From: |
Peter Maydell |
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Subject: |
Re: [Qemu-devel] [PATCH v3] hw/arm/virt-acpi-build: Set COHACC override flag in IORT SMMUv3 node |
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Date: |
Tue, 8 Jan 2019 11:54:34 +0000 |
On Mon, 7 Jan 2019 at 10:10, Eric Auger <address@hidden> wrote:
>
> Let's report IO-coherent access is supported for translation
> table walks, descriptor fetches and queues by setting the COHACC
> override flag. Without that, we observe wrong command opcodes.
> The DT description also advertises the dma coherency.
>
> Fixes a703b4f6c1ee ("hw/arm/virt-acpi-build: Add smmuv3 node in IORT table")
>
> Signed-off-by: Eric Auger <address@hidden>
> Reported-by: Shameerali Kolothum Thodi <address@hidden>
> Tested-by: Shameer Kolothum <address@hidden>
> Reviewed-by: Andrew Jones <address@hidden>
>
> ---
> v2 -> v3:
> - added cpu_to_le32
> ---
Applied to target-arm.next, thanks.
-- PMM