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[Qemu-devel] [PATCH v3 17/31] target/arm: Introduce arm_stage1_mmu_idx
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v3 17/31] target/arm: Introduce arm_stage1_mmu_idx |
Date: |
Wed, 9 Jan 2019 08:31:15 +1000 |
While we could expose stage_1_mmu_idx, the combination is
probably going to be more useful.
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/internals.h | 15 +++++++++++++++
target/arm/helper.c | 7 +++++++
2 files changed, 22 insertions(+)
diff --git a/target/arm/internals.h b/target/arm/internals.h
index 89f3b122a4..248fdf7a3c 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -927,4 +927,19 @@ void arm_cpu_update_vfiq(ARMCPU *cpu);
*/
ARMMMUIdx arm_mmu_idx(CPUARMState *env);
+/**
+ * arm_stage1_mmu_idx:
+ * @env: The cpu environment
+ *
+ * Return the ARMMMUIdx for the stage1 traversal for the current regime.
+ */
+#ifdef CONFIG_USER_ONLY
+static inline ARMMMUIdx arm_stage1_mmu_idx(CPUARMState *env)
+{
+ return ARMMMUIdx_S1NSE0;
+}
+#else
+ARMMMUIdx arm_stage1_mmu_idx(CPUARMState *env);
+#endif
+
#endif
diff --git a/target/arm/helper.c b/target/arm/helper.c
index ba6733c4f1..4af8abd18f 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -12998,6 +12998,13 @@ int cpu_mmu_index(CPUARMState *env, bool ifetch)
return arm_to_core_mmu_idx(arm_mmu_idx(env));
}
+#ifndef CONFIG_USER_ONLY
+ARMMMUIdx arm_stage1_mmu_idx(CPUARMState *env)
+{
+ return stage_1_mmu_idx(arm_mmu_idx(env));
+}
+#endif
+
void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
target_ulong *cs_base, uint32_t *pflags)
{
--
2.17.2
- [Qemu-devel] [PATCH v3 11/31] target/arm: Add new_pc argument to helper_exception_return, (continued)
- [Qemu-devel] [PATCH v3 11/31] target/arm: Add new_pc argument to helper_exception_return, Richard Henderson, 2019/01/08
- [Qemu-devel] [PATCH v3 10/31] target/arm: Move helper_exception_return to helper-a64.c, Richard Henderson, 2019/01/08
- [Qemu-devel] [PATCH v3 12/31] target/arm: Rearrange decode in disas_uncond_b_reg, Richard Henderson, 2019/01/08
- [Qemu-devel] [PATCH v3 13/31] target/arm: Decode PAuth within disas_uncond_b_reg, Richard Henderson, 2019/01/08
- [Qemu-devel] [PATCH v3 16/31] target/arm: Introduce arm_mmu_idx, Richard Henderson, 2019/01/08
- [Qemu-devel] [PATCH v3 14/31] target/arm: Decode Load/store register (pac), Richard Henderson, 2019/01/08
- [Qemu-devel] [PATCH v3 15/31] target/arm: Move cpu_mmu_index out of line, Richard Henderson, 2019/01/08
- [Qemu-devel] [PATCH v3 17/31] target/arm: Introduce arm_stage1_mmu_idx,
Richard Henderson <=
- [Qemu-devel] [PATCH v3 20/31] target/arm: Export aa64_va_parameters to internals.h, Richard Henderson, 2019/01/08
- [Qemu-devel] [PATCH v3 19/31] target/arm: Merge TBFLAG_AA_TB{0, 1} to TBII, Richard Henderson, 2019/01/08
- [Qemu-devel] [PATCH v3 18/31] target/arm: Create ARMVAParameters and helpers, Richard Henderson, 2019/01/08
- [Qemu-devel] [PATCH v3 21/31] target/arm: Add aa64_va_parameters_both, Richard Henderson, 2019/01/08
- [Qemu-devel] [PATCH v3 22/31] target/arm: Decode TBID from TCR, Richard Henderson, 2019/01/08