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[Qemu-devel] [PATCH v3 15/19] spapr_xive: Cache device tree nodename in
From: |
Greg Kurz |
Subject: |
[Qemu-devel] [PATCH v3 15/19] spapr_xive: Cache device tree nodename in sPAPRXive |
Date: |
Thu, 17 Jan 2019 18:16:05 +0100 |
User-agent: |
StGit/unknown-version |
PHB hotplug will need to know the name of the XIVE controller node. Since
it is an invariant for the machine lifetime, compute it at realize and
store it under the sPAPRXive structure.
Signed-off-by: Greg Kurz <address@hidden>
---
hw/intc/spapr_xive.c | 9 ++++-----
include/hw/ppc/spapr_xive.h | 3 +++
2 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c
index e542ae59d7fd..9732c3d89c77 100644
--- a/hw/intc/spapr_xive.c
+++ b/hw/intc/spapr_xive.c
@@ -316,6 +316,9 @@ static void spapr_xive_realize(DeviceState *dev, Error
**errp)
/* Map all regions */
spapr_xive_map_mmio(xive);
+ xive->nodename = g_strdup_printf("address@hidden" PRIx64,
+ xive->tm_base + XIVE_TM_USER_PAGE * (1 <<
TM_SHIFT));
+
qemu_register_reset(spapr_xive_reset, dev);
}
@@ -1436,7 +1439,6 @@ int spapr_dt_xive(sPAPRMachineState *spapr, uint32_t
nr_servers, void *fdt)
cpu_to_be32(7), /* start */
cpu_to_be32(0xf8), /* count */
};
- gchar *nodename;
/*
* The "ibm,plat-res-int-priorities" property defines the priority
@@ -1453,10 +1455,7 @@ int spapr_dt_xive(sPAPRMachineState *spapr, uint32_t
nr_servers, void *fdt)
XIVE_TM_OS_PAGE * (1ull << TM_SHIFT));
timas[3] = cpu_to_be64(1ull << TM_SHIFT);
- nodename = g_strdup_printf("address@hidden" PRIx64,
- xive->tm_base + XIVE_TM_USER_PAGE * (1 <<
TM_SHIFT));
- _FDT(node = fdt_add_subnode(fdt, 0, nodename));
- g_free(nodename);
+ _FDT(node = fdt_add_subnode(fdt, 0, xive->nodename));
_FDT(fdt_setprop_string(fdt, node, "device_type", "power-ivpe"));
_FDT(fdt_setprop(fdt, node, "reg", timas, sizeof(timas)));
diff --git a/include/hw/ppc/spapr_xive.h b/include/hw/ppc/spapr_xive.h
index 29dafead9ba0..deea34b03ee5 100644
--- a/include/hw/ppc/spapr_xive.h
+++ b/include/hw/ppc/spapr_xive.h
@@ -26,6 +26,9 @@ typedef struct sPAPRXive {
XiveENDSource end_source;
hwaddr end_base;
+ /* DT */
+ gchar *nodename;
+
/* Routing table */
XiveEAS *eat;
uint32_t nr_irqs;
- Re: [Qemu-devel] [PATCH v3 07/19] spapr_pci: add PHB unrealize, (continued)
- [Qemu-devel] [PATCH v3 10/19] spapr_events: add support for phb hotplug events, Greg Kurz, 2019/01/17
- [Qemu-devel] [PATCH v3 13/19] spapr_pci: add ibm, my-drc-index property for PHB hotplug, Greg Kurz, 2019/01/17
- [Qemu-devel] [PATCH v3 11/19] qdev: pass an Object * to qbus_set_hotplug_handler(), Greg Kurz, 2019/01/17
- [Qemu-devel] [PATCH v3 12/19] spapr_pci: provide node start offset via spapr_populate_pci_dt(), Greg Kurz, 2019/01/17
- [Qemu-devel] [PATCH v3 14/19] spapr: Factor out setting of "phandle" DT property to sPAPR irq frontend, Greg Kurz, 2019/01/17
- [Qemu-devel] [PATCH v3 16/19] spapr: Expose the name of the interrupt controller node, Greg Kurz, 2019/01/17
- [Qemu-devel] [PATCH v3 15/19] spapr_xive: Cache device tree nodename in sPAPRXive,
Greg Kurz <=
[Qemu-devel] [PATCH v3 17/19] spapr_irq: Expose the phandle of the interrupt controller, Greg Kurz, 2019/01/17
[Qemu-devel] [PATCH v3 18/19] spapr: add hotplug hooks for PHB hotplug, Greg Kurz, 2019/01/17
[Qemu-devel] [PATCH v3 19/19] spapr: enable PHB hotplug for default pseries machine type, Greg Kurz, 2019/01/17