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Re: [Qemu-devel] [PULL 00/12] MIPS queue for January 17, 2019*
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PULL 00/12] MIPS queue for January 17, 2019* |
Date: |
Fri, 18 Jan 2019 12:41:40 +0000 |
On Thu, 17 Jan 2019 at 18:13, Aleksandar Markovic
<address@hidden> wrote:
>
> From: Aleksandar Markovic <address@hidden>
>
> The following changes since commit 681d61362d3f766a00806b89d6581869041f73cb:
>
> Merge remote-tracking branch 'remotes/jnsnow/tags/bitmaps-pull-request'
> into staging (2019-01-17 12:48:42 +0000)
>
> are available in the git repository at:
>
> https://github.com/AMarkovic/qemu tags/mips-queue-january-17-2019
>
> for you to fetch changes up to 60bfe335972213bada1ac954e84234aa7c4046f9:
>
> target/mips: Introduce 32 R5900 multimedia registers (2019-01-17 19:06:56
> +0100)
>
> ----------------------------------------------------------------
>
> MIPS queue for January 17, 2019
>
> - provide access to configuration registers SAARI, SAAR, and
> MemoryMapID
> - update Inter-Thread Communication Unit
> - CP0-related cleanups
> - introduce R5900 multimedia registers
>
Hi; I'm afraid this fails 'make check' on all platforms:
MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}
QTEST_QEMU_BINARY=mips64el-softmmu
/qemu-system-mips64el QTEST_QEMU_IMG=qemu-img tests/machine-none-test
-m=quick -k --tap < /dev/null
| ./scripts/tap-driver.pl --test-name="machine-none-test"
PASS 1 machine-none-test /mips64el/machine/none/cpu_option
MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}
QTEST_QEMU_BINARY=mips64el-softmmu
/qemu-system-mips64el QTEST_QEMU_IMG=qemu-img tests/qom-test -m=quick
-k --tap < /dev/null | ./scrip
ts/tap-driver.pl --test-name="qom-test"
qemu-system-mips64el: Property '.saar-present' not found
Broken pipe
/home/petmay01/linaro/qemu-for-merges/tests/libqtest.c:135:
kill_qemu() tried to terminate QEMU proc
ess but encountered exit status 1
ERROR - too few tests run (expected 8, got 0)
Aborted (core dumped)
thanks
-- PMM
- [Qemu-devel] [PULL 01/12] target/mips: Move comment containing summary of CP0 registers, (continued)
- [Qemu-devel] [PULL 01/12] target/mips: Move comment containing summary of CP0 registers, Aleksandar Markovic, 2019/01/17
- [Qemu-devel] [PULL 04/12] target/mips: Add fields for SAARI and SAAR CP0 registers, Aleksandar Markovic, 2019/01/17
- [Qemu-devel] [PULL 07/12] target/mips: Update ITU to utilize SAARI and SAAR CP0 registers, Aleksandar Markovic, 2019/01/17
- [Qemu-devel] [PULL 05/12] target/mips: Provide R/W access to SAARI and SAAR CP0 registers, Aleksandar Markovic, 2019/01/17
- [Qemu-devel] [PULL 08/12] target/mips: Update ITU to handle bus errors, Aleksandar Markovic, 2019/01/17
- [Qemu-devel] [PULL 10/12] target/mips: Add CP0 register MemoryMapID, Aleksandar Markovic, 2019/01/17
- [Qemu-devel] [PULL 12/12] target/mips: Introduce 32 R5900 multimedia registers, Aleksandar Markovic, 2019/01/17
- [Qemu-devel] [PULL 03/12] target/mips: Use preprocessor constants for 32 major CP0 registers, Aleksandar Markovic, 2019/01/17
- [Qemu-devel] [PULL 09/12] target/mips: Amend preprocessor constants for CP0 registers, Aleksandar Markovic, 2019/01/17
- [Qemu-devel] [PULL 11/12] target/mips: Rename 'rn' to 'register_name', Aleksandar Markovic, 2019/01/17
- Re: [Qemu-devel] [PULL 00/12] MIPS queue for January 17, 2019*,
Peter Maydell <=