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[Qemu-devel] [PATCH RFC 10/11] Add rx-softmmu.
From: |
Yoshinori Sato |
Subject: |
[Qemu-devel] [PATCH RFC 10/11] Add rx-softmmu. |
Date: |
Mon, 21 Jan 2019 22:16:01 +0900 |
Signed-off-by: Yoshinori Sato <address@hidden>
---
arch_init.c | 2 ++
configure | 8 ++++++++
default-configs/rx-softmmu.mak | 7 +++++++
include/sysemu/arch_init.h | 1 +
target/rx/Makefile.objs | 2 ++
5 files changed, 20 insertions(+)
create mode 100644 default-configs/rx-softmmu.mak
create mode 100644 target/rx/Makefile.objs
diff --git a/arch_init.c b/arch_init.c
index f4f3f610c8..cc25ddd7ca 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -74,6 +74,8 @@ int graphic_depth = 32;
#define QEMU_ARCH QEMU_ARCH_PPC
#elif defined(TARGET_RISCV)
#define QEMU_ARCH QEMU_ARCH_RISCV
+#elif defined(TARGET_RX)
+#define QEMU_ARCH QEMU_ARCH_RX
#elif defined(TARGET_S390X)
#define QEMU_ARCH QEMU_ARCH_S390X
#elif defined(TARGET_SH4)
diff --git a/configure b/configure
index 12fd34f30b..72d974283c 100755
--- a/configure
+++ b/configure
@@ -7232,6 +7232,11 @@ case "$target_name" in
mttcg=yes
target_compiler=$cross_cc_riscv64
;;
+ rx)
+ TARGET_ARCH=rx
+ bflt="yes"
+ target_compiler=$cross_cc_rx
+ ;;
sh4|sh4eb)
TARGET_ARCH=sh4
bflt="yes"
@@ -7452,6 +7457,9 @@ for i in $ARCH $TARGET_BASE_ARCH ; do
riscv*)
disas_config "RISCV"
;;
+ rx)
+ disas_config "RX"
+ ;;
s390*)
disas_config "S390"
;;
diff --git a/default-configs/rx-softmmu.mak b/default-configs/rx-softmmu.mak
new file mode 100644
index 0000000000..0aaa8d4332
--- /dev/null
+++ b/default-configs/rx-softmmu.mak
@@ -0,0 +1,7 @@
+# Default configuration for rx-softmmu
+
+CONFIG_SERIAL=y
+CONFIG_PTIMER=y
+CONFIG_RX=y
+CONFIG_RENESAS_SCI=y
+CONFIG_RX_DIS=y
diff --git a/include/sysemu/arch_init.h b/include/sysemu/arch_init.h
index 32abdfe6a1..b05924ec87 100644
--- a/include/sysemu/arch_init.h
+++ b/include/sysemu/arch_init.h
@@ -25,6 +25,7 @@ enum {
QEMU_ARCH_NIOS2 = (1 << 17),
QEMU_ARCH_HPPA = (1 << 18),
QEMU_ARCH_RISCV = (1 << 19),
+ QEMU_ARCH_RX = (1 << 20),
};
extern const uint32_t arch_type;
diff --git a/target/rx/Makefile.objs b/target/rx/Makefile.objs
new file mode 100644
index 0000000000..147489460f
--- /dev/null
+++ b/target/rx/Makefile.objs
@@ -0,0 +1,2 @@
+obj-y += translate.o op_helper.o helper.o cpu.o gdbstub.o
+obj-$(CONFIG_SOFTMMU) += monitor.o
--
2.11.0
- [Qemu-devel] [PATCH RFC 00/11] Add Renesas RX archtecture, Yoshinori Sato, 2019/01/21
- [Qemu-devel] [PATCH RFC 05/11] RX disassembler, Yoshinori Sato, 2019/01/21
- [Qemu-devel] [PATCH RFC 03/11] TCG helper functions, Yoshinori Sato, 2019/01/21
- [Qemu-devel] [PATCH RFC 10/11] Add rx-softmmu.,
Yoshinori Sato <=
- [Qemu-devel] [PATCH RFC 07/11] RX62N internal timer unit., Yoshinori Sato, 2019/01/21
- [Qemu-devel] [PATCH RFC 09/11] RX Target hardware definition., Yoshinori Sato, 2019/01/21
- [Qemu-devel] [PATCH RFC 02/11] RX CPU definition, Yoshinori Sato, 2019/01/21
- [Qemu-devel] [PATCH RFC 11/11] MAINTAINERS: Add RX entry., Yoshinori Sato, 2019/01/21
- [Qemu-devel] [PATCH RFC 04/11] Target miscellaneous functions., Yoshinori Sato, 2019/01/21
- [Qemu-devel] [PATCH RFC 06/11] RX62N interrupt contoller., Yoshinori Sato, 2019/01/21
- [Qemu-devel] [PATCH RFC 08/11] RX62N internal serical communication interface., Yoshinori Sato, 2019/01/21
- [Qemu-devel] [PATCH RFC 01/11] TCG translation, Yoshinori Sato, 2019/01/21