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[Qemu-devel] [PATCH v2 5/5] tests/microbit-test: Add tests for nRF51 NVM
From: |
Stefan Hajnoczi |
Subject: |
[Qemu-devel] [PATCH v2 5/5] tests/microbit-test: Add tests for nRF51 NVMC |
Date: |
Wed, 23 Jan 2019 21:22:34 +0000 |
From: Steffen Görtz <address@hidden>
Signed-off-by: Steffen Görtz <address@hidden>
Signed-off-by: Stefan Hajnoczi <address@hidden>
---
tests/microbit-test.c | 97 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 97 insertions(+)
diff --git a/tests/microbit-test.c b/tests/microbit-test.c
index 0c125535f6..d3edd38643 100644
--- a/tests/microbit-test.c
+++ b/tests/microbit-test.c
@@ -20,8 +20,104 @@
#include "hw/arm/nrf51.h"
#include "hw/gpio/nrf51_gpio.h"
+#include "hw/nvram/nrf51_nvm.h"
#include "hw/timer/nrf51_timer.h"
+#define FLASH_SIZE (256 * NRF51_PAGE_SIZE)
+
+static void fill_and_erase(hwaddr base, hwaddr size, uint32_t address_reg)
+{
+ hwaddr i;
+
+ /* Erase Page */
+ writel(NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x02);
+ writel(NRF51_NVMC_BASE + address_reg, base);
+ writel(NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x00);
+
+ /* Check memory */
+ for (i = 0; i < size / 4; i++) {
+ g_assert_cmpuint(readl(base + i * 4), ==, 0xFFFFFFFF);
+ }
+
+ /* Fill memory */
+ writel(NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x01);
+ for (i = 0; i < size / 4; i++) {
+ writel(base + i * 4, i);
+ g_assert_cmpuint(readl(base + i * 4), ==, i);
+ }
+ writel(NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x00);
+}
+
+static void test_nrf51_nvmc(void)
+{
+ uint32_t value;
+ hwaddr i;
+
+ /* Test always ready */
+ value = readl(NRF51_NVMC_BASE + NRF51_NVMC_READY);
+ g_assert_cmpuint(value & 0x01, ==, 0x01);
+
+ /* Test write-read config register */
+ writel(NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x03);
+ g_assert_cmpuint(readl(NRF51_NVMC_BASE + NRF51_NVMC_CONFIG), ==, 0x03);
+ writel(NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x00);
+ g_assert_cmpuint(readl(NRF51_NVMC_BASE + NRF51_NVMC_CONFIG), ==, 0x00);
+
+ /* Test PCR0 */
+ fill_and_erase(NRF51_FLASH_BASE, NRF51_PAGE_SIZE, NRF51_NVMC_ERASEPCR0);
+ fill_and_erase(NRF51_FLASH_BASE + NRF51_PAGE_SIZE,
+ NRF51_PAGE_SIZE, NRF51_NVMC_ERASEPCR0);
+
+ /* Test PCR1 */
+ fill_and_erase(NRF51_FLASH_BASE, NRF51_PAGE_SIZE, NRF51_NVMC_ERASEPCR1);
+ fill_and_erase(NRF51_FLASH_BASE + NRF51_PAGE_SIZE,
+ NRF51_PAGE_SIZE, NRF51_NVMC_ERASEPCR1);
+
+ /* Erase all */
+ writel(NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x02);
+ writel(NRF51_NVMC_BASE + NRF51_NVMC_ERASEALL, 0x01);
+ writel(NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x00);
+
+ writel(NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x01);
+ for (i = 0; i < FLASH_SIZE / 4; i++) {
+ writel(NRF51_FLASH_BASE + i * 4, i);
+ g_assert_cmpuint(readl(NRF51_FLASH_BASE + i * 4), ==, i);
+ }
+ writel(NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x00);
+
+ writel(NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x02);
+ writel(NRF51_NVMC_BASE + NRF51_NVMC_ERASEALL, 0x01);
+ writel(NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x00);
+
+ for (i = 0; i < FLASH_SIZE / 4; i++) {
+ g_assert_cmpuint(readl(NRF51_FLASH_BASE + i * 4), ==, 0xFFFFFFFF);
+ }
+
+ /* Erase UICR */
+ writel(NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x02);
+ writel(NRF51_NVMC_BASE + NRF51_NVMC_ERASEUICR, 0x01);
+ writel(NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x00);
+
+ for (i = 0; i < NRF51_UICR_SIZE / 4; i++) {
+ g_assert_cmpuint(readl(NRF51_UICR_BASE + i * 4), ==, 0xFFFFFFFF);
+ }
+
+ writel(NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x01);
+ for (i = 0; i < NRF51_UICR_SIZE / 4; i++) {
+ writel(NRF51_UICR_BASE + i * 4, i);
+ g_assert_cmpuint(readl(NRF51_UICR_BASE + i * 4), ==, i);
+ }
+ writel(NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x00);
+
+ writel(NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x02);
+ writel(NRF51_NVMC_BASE + NRF51_NVMC_ERASEUICR, 0x01);
+ writel(NRF51_NVMC_BASE + NRF51_NVMC_CONFIG, 0x00);
+
+ for (i = 0; i < NRF51_UICR_SIZE / 4; i++) {
+ g_assert_cmpuint(readl(NRF51_UICR_BASE + i * 4), ==, 0xFFFFFFFF);
+ }
+}
+
static void test_nrf51_gpio(void)
{
size_t i;
@@ -246,6 +342,7 @@ int main(int argc, char **argv)
global_qtest = qtest_initf("-machine microbit");
qtest_add_func("/microbit/nrf51/gpio", test_nrf51_gpio);
+ qtest_add_func("/microbit/nrf51/nvmc", test_nrf51_nvmc);
qtest_add_func("/microbit/nrf51/timer", test_nrf51_timer);
ret = g_test_run();
--
2.20.1
- [Qemu-devel] [PATCH v2 0/5] arm: microbit Non-Volatile Memory Controller, Stefan Hajnoczi, 2019/01/23
- [Qemu-devel] [PATCH v2 2/5] pflash: flush rom device memory region, Stefan Hajnoczi, 2019/01/23
- [Qemu-devel] [PATCH v2 1/5] memory: add memory_region_flush_rom_device(), Stefan Hajnoczi, 2019/01/23
- [Qemu-devel] [PATCH v2 3/5] hw/nvram/nrf51_nvm: Add nRF51 non-volatile memories, Stefan Hajnoczi, 2019/01/23
- [Qemu-devel] [PATCH v2 5/5] tests/microbit-test: Add tests for nRF51 NVMC,
Stefan Hajnoczi <=
- [Qemu-devel] [PATCH v2 4/5] arm: Instantiate NRF51 special NVM's and NVMC, Stefan Hajnoczi, 2019/01/23
- Re: [Qemu-devel] [PATCH v2 0/5] arm: microbit Non-Volatile Memory Controller, Peter Maydell, 2019/01/24