[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 1/7] target/arm/translate-a64: Don't underdecode sys
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH 1/7] target/arm/translate-a64: Don't underdecode system instructions |
Date: |
Fri, 25 Jan 2019 18:26:20 +0000 |
The "system instructions" and "system register move" subcategories
of "branches, exception generating and system instructions" for A64
only apply if bits [23:22] are zero; other values are currently
unallocated. Correctly UNDEF these unallocated encodings.
Reported-by: Laurent Desnogues <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/translate-a64.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 4d28a27c3bd..e6df303e321 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -2144,7 +2144,11 @@ static void disas_b_exc_sys(DisasContext *s, uint32_t
insn)
break;
case 0x6a: /* Exception generation / System */
if (insn & (1 << 24)) {
- disas_system(s, insn);
+ if (extract32(insn, 22, 2) == 0) {
+ disas_system(s, insn);
+ } else {
+ unallocated_encoding(s);
+ }
} else {
disas_exc(s, insn);
}
--
2.20.1
- Re: [Qemu-devel] [PATCH 6/7] target/arm/translate-a64: Don't underdecode FP insns, (continued)
- [Qemu-devel] [PATCH 7/7] target/arm/translate-a64: Don't underdecode SDOT and UDOT, Peter Maydell, 2019/01/25
- [Qemu-devel] [PATCH 5/7] target/arm/translate-a64: Don't underdecode add/sub extended register, Peter Maydell, 2019/01/25
- [Qemu-devel] [PATCH 3/7] target/arm/translate-a64: Don't underdecode SIMD ld/st multiple, Peter Maydell, 2019/01/25
- [Qemu-devel] [PATCH 4/7] target/arm/translate-a64: Don't underdecode SIMD ld/st single, Peter Maydell, 2019/01/25
- [Qemu-devel] [PATCH 1/7] target/arm/translate-a64: Don't underdecode system instructions,
Peter Maydell <=
- [Qemu-devel] [PATCH 2/7] target/arm/translate-a64: Don't underdecode PRFM, Peter Maydell, 2019/01/25