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[Qemu-devel] [PULL 11/23] cputlb: do not evict empty entries to the vtlb
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 11/23] cputlb: do not evict empty entries to the vtlb |
Date: |
Mon, 28 Jan 2019 07:58:55 -0800 |
From: "Emilio G. Cota" <address@hidden>
Currently we evict an entry to the victim TLB when it doesn't match
the current address. But it could be that there's no match because
the current entry is empty (i.e. all -1's, for instance via tlb_flush).
Do not evict the entry to the vtlb in that case.
This change will help us keep track of the TLB's use rate, which
we'll use to implement a policy for dynamic TLB sizing.
Tested-by: Alex Bennée <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Emilio G. Cota <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
accel/tcg/cputlb.c | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index af6bd8ccf9..10f1150c62 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -224,6 +224,15 @@ static inline bool tlb_hit_page_anyprot(CPUTLBEntry
*tlb_entry,
tlb_hit_page(tlb_entry->addr_code, page);
}
+/**
+ * tlb_entry_is_empty - return true if the entry is not in use
+ * @te: pointer to CPUTLBEntry
+ */
+static inline bool tlb_entry_is_empty(const CPUTLBEntry *te)
+{
+ return te->addr_read == -1 && te->addr_write == -1 && te->addr_code == -1;
+}
+
/* Called with tlb_c.lock held */
static inline void tlb_flush_entry_locked(CPUTLBEntry *tlb_entry,
target_ulong page)
@@ -591,7 +600,7 @@ void tlb_set_page_with_attrs(CPUState *cpu, target_ulong
vaddr,
* Only evict the old entry to the victim tlb if it's for a
* different page; otherwise just overwrite the stale data.
*/
- if (!tlb_hit_page_anyprot(te, vaddr_page)) {
+ if (!tlb_hit_page_anyprot(te, vaddr_page) && !tlb_entry_is_empty(te)) {
unsigned vidx = env->tlb_d[mmu_idx].vindex++ % CPU_VTLB_SIZE;
CPUTLBEntry *tv = &env->tlb_v_table[mmu_idx][vidx];
--
2.17.2
- [Qemu-devel] [PULL 02/23] tcg: Add gvec expanders for nand, nor, eqv, (continued)
- [Qemu-devel] [PULL 02/23] tcg: Add gvec expanders for nand, nor, eqv, Richard Henderson, 2019/01/28
- [Qemu-devel] [PULL 03/23] tcg: Add write_aofs to GVecGen4, Richard Henderson, 2019/01/28
- [Qemu-devel] [PULL 04/23] tcg: Add opcodes for vector saturated arithmetic, Richard Henderson, 2019/01/28
- [Qemu-devel] [PULL 05/23] tcg: Add opcodes for vector minmax arithmetic, Richard Henderson, 2019/01/28
- [Qemu-devel] [PULL 07/23] tcg/i386: Implement vector saturating arithmetic, Richard Henderson, 2019/01/28
- [Qemu-devel] [PULL 08/23] tcg/i386: Implement vector minmax arithmetic, Richard Henderson, 2019/01/28
- [Qemu-devel] [PULL 06/23] tcg/i386: Split subroutines out of tcg_expand_vec_op, Richard Henderson, 2019/01/28
- [Qemu-devel] [PULL 09/23] tcg/aarch64: Implement vector saturating arithmetic, Richard Henderson, 2019/01/28
- [Qemu-devel] [PULL 10/23] tcg/aarch64: Implement vector minmax arithmetic, Richard Henderson, 2019/01/28
- [Qemu-devel] [PULL 22/23] tcg/tci: enable dynamic TLB sizing, Richard Henderson, 2019/01/28
- [Qemu-devel] [PULL 11/23] cputlb: do not evict empty entries to the vtlb,
Richard Henderson <=
- [Qemu-devel] [PULL 15/23] tcg/ppc: enable dynamic TLB sizing, Richard Henderson, 2019/01/28
- [Qemu-devel] [PULL 17/23] tcg/s390: enable dynamic TLB sizing, Richard Henderson, 2019/01/28
- [Qemu-devel] [PULL 16/23] tcg/sparc: enable dynamic TLB sizing, Richard Henderson, 2019/01/28
- [Qemu-devel] [PULL 14/23] tcg/aarch64: enable dynamic TLB sizing, Richard Henderson, 2019/01/28
- [Qemu-devel] [PULL 13/23] tcg/i386: enable dynamic TLB sizing, Richard Henderson, 2019/01/28
- [Qemu-devel] [PULL 12/23] tcg: introduce dynamic TLB sizing, Richard Henderson, 2019/01/28
- [Qemu-devel] [PULL 21/23] tcg/mips: enable dynamic TLB sizing, Richard Henderson, 2019/01/28
- [Qemu-devel] [PULL 20/23] tcg/mips: Fix tcg_out_qemu_ld_slow_path, Richard Henderson, 2019/01/28
- [Qemu-devel] [PULL 19/23] tcg/arm: enable dynamic TLB sizing, Richard Henderson, 2019/01/28
- [Qemu-devel] [PULL 18/23] tcg/riscv: enable dynamic TLB sizing, Richard Henderson, 2019/01/28