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[Qemu-devel] [PATCH v5 6/8] target/ppc: simplify VEXT_SIGNED macro in in
From: |
Mark Cave-Ayland |
Subject: |
[Qemu-devel] [PATCH v5 6/8] target/ppc: simplify VEXT_SIGNED macro in int_helper.c |
Date: |
Wed, 30 Jan 2019 20:36:36 +0000 |
As pointed out by Richard: it does not need the mask argument, nor does it need
the recast argument. The masking is implied by the cast argument, and the
recast is implied by the assignment.
Signed-off-by: Mark Cave-Ayland <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
---
target/ppc/int_helper.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
index 355b6630a2..ffc9cbc4ed 100644
--- a/target/ppc/int_helper.c
+++ b/target/ppc/int_helper.c
@@ -2024,19 +2024,19 @@ void helper_xxinsertw(CPUPPCState *env, target_ulong
xtn,
putVSR(xtn, &xt, env);
}
-#define VEXT_SIGNED(name, element, mask, cast, recast) \
+#define VEXT_SIGNED(name, element, cast) \
void helper_##name(ppc_avr_t *r, ppc_avr_t *b) \
{ \
int i; \
VECTOR_FOR_INORDER_I(i, element) { \
- r->element[i] = (recast)((cast)(b->element[i] & mask)); \
+ r->element[i] = (cast)b->element[i]; \
} \
}
-VEXT_SIGNED(vextsb2w, s32, UINT8_MAX, int8_t, int32_t)
-VEXT_SIGNED(vextsb2d, s64, UINT8_MAX, int8_t, int64_t)
-VEXT_SIGNED(vextsh2w, s32, UINT16_MAX, int16_t, int32_t)
-VEXT_SIGNED(vextsh2d, s64, UINT16_MAX, int16_t, int64_t)
-VEXT_SIGNED(vextsw2d, s64, UINT32_MAX, int32_t, int64_t)
+VEXT_SIGNED(vextsb2w, s32, int8_t)
+VEXT_SIGNED(vextsb2d, s64, int8_t)
+VEXT_SIGNED(vextsh2w, s32, int16_t)
+VEXT_SIGNED(vextsh2d, s64, int16_t)
+VEXT_SIGNED(vextsw2d, s64, int32_t)
#undef VEXT_SIGNED
#define VNEG(name, element) \
--
2.11.0
- [Qemu-devel] [PATCH v5 0/8] target/ppc: remove various endian hacks from int_helper.c, Mark Cave-Ayland, 2019/01/30
- [Qemu-devel] [PATCH v5 1/8] target/ppc: implement complete set of Vsr* macros, Mark Cave-Ayland, 2019/01/30
- [Qemu-devel] [PATCH v5 2/8] target/ppc: rework vmrg{l, h}{b, h, w} instructions to use Vsr* macros, Mark Cave-Ayland, 2019/01/30
- [Qemu-devel] [PATCH v5 3/8] target/ppc: rework vmul{e, o}{s, u}{b, h, w} instructions to use Vsr* macros, Mark Cave-Ayland, 2019/01/30
- [Qemu-devel] [PATCH v5 4/8] target/ppc: eliminate use of HI_IDX and LO_IDX macros from int_helper.c, Mark Cave-Ayland, 2019/01/30
- [Qemu-devel] [PATCH v5 5/8] target/ppc: eliminate use of EL_IDX macros from int_helper.c, Mark Cave-Ayland, 2019/01/30
- [Qemu-devel] [PATCH v5 6/8] target/ppc: simplify VEXT_SIGNED macro in int_helper.c,
Mark Cave-Ayland <=
- [Qemu-devel] [PATCH v5 7/8] target/ppc: remove ROTRu32 and ROTRu64 macros from int_helper.c, Mark Cave-Ayland, 2019/01/30
- [Qemu-devel] [PATCH v5 8/8] target/ppc: remove various HOST_WORDS_BIGENDIAN hacks in int_helper.c, Mark Cave-Ayland, 2019/01/30
- Re: [Qemu-devel] [PATCH v5 0/8] target/ppc: remove various endian hacks from int_helper.c, David Gibson, 2019/01/30