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Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree
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Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree |
Date: |
Thu, 31 Jan 2019 10:06:54 -0800 (PST) |
Patchew URL: https://patchew.org/QEMU/address@hidden/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree
Type: series
Message-id: address@hidden
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
8fff3fc6a2 target/riscv: Remaining rvc insn reuse 32 bit translators
c563ab1ecb target/riscv: Splice remaining compressed insn pairs for riscv32 vs
riscv64
e2d25e9d55 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
aa0f8ada63 target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
c57a581714 target/riscv: Convert @cs_2 insns to share translation functions
0a0a43441c target/riscv: Remove decode_RV32_64G()
30f9d142a0 target/riscv: Remove gen_system()
5710f6d871 target/riscv: Rename trans_arith to gen_arith
3f07a91951 target/riscv: Remove manual decoding of RV32/64M insn
0fc287193b target/riscv: Remove shift and slt insn manual decoding
236a600baf target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
a4fde90aab target/riscv: Move gen_arith_imm() decoding into trans_* functions
efebe9125f target/riscv: Remove manual decoding from gen_store()
30bef8034b target/riscv: Remove manual decoding from gen_load()
ea82022814 target/riscv: Remove manual decoding from gen_branch()
047f3d2ee4 target/riscv: Remove gen_jalr()
7ea527626d target/riscv: Convert quadrant 2 of RVXC insns to decodetree
27b3303efa target/riscv: Convert quadrant 1 of RVXC insns to decodetree
6a90487077 target/riscv: Convert quadrant 0 of RVXC insns to decodetree
2d8731dad1 target/riscv: Convert RV priv insns to decodetree
b78a5409c2 target/riscv: Convert RV64D insns to decodetree
7181a4f946 target/riscv: Convert RV32D insns to decodetree
dbb77cd4df target/riscv: Convert RV64F insns to decodetree
6ff19f1f62 target/riscv: Convert RV32F insns to decodetree
101b3708d7 target/riscv: Convert RV64A insns to decodetree
18db9d7cbe target/riscv: Convert RV32A insns to decodetree
c2032943b6 target/riscv: Convert RVXM insns to decodetree
80b7b0b6e0 target/riscv: Convert RVXI csr insns to decodetree
35ca21d90a target/riscv: Convert RVXI fence insns to decodetree
a974405bbb target/riscv: Convert RVXI arithmetic insns to decodetree
3ea0060942 target/riscv: Convert RV64I load/store insns to decodetree
c1b9e8b927 target/riscv: Convert RV32I load/store insns to decodetree
109a6de64b target/riscv: Convert RVXI branch insns to decodetree
492967f3a6 target/riscv: Activate decodetree and implemnt LUI & AUIPC
7f257b74de target/riscv: Move CPURISCVState pointer to DisasContext
=== OUTPUT BEGIN ===
1/35 Checking commit 7f257b74decd (target/riscv: Move CPURISCVState pointer to
DisasContext)
2/35 Checking commit 492967f3a6ae (target/riscv: Activate decodetree and
implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34:
new file mode 100644
ERROR: externs should be avoided in .c files
#125: FILE: target/riscv/translate.c:1687:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);
total: 1 errors, 1 warnings, 125 lines checked
Patch 2/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
3/35 Checking commit 109a6de64b62 (target/riscv: Convert RVXI branch insns to
decodetree)
4/35 Checking commit c1b9e8b927b1 (target/riscv: Convert RV32I load/store insns
to decodetree)
5/35 Checking commit 3ea006094257 (target/riscv: Convert RV64I load/store insns
to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#39:
new file mode 100644
total: 0 errors, 1 warnings, 76 lines checked
Patch 5/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/35 Checking commit a974405bbbae (target/riscv: Convert RVXI arithmetic insns
to decodetree)
7/35 Checking commit 35ca21d90a96 (target/riscv: Convert RVXI fence insns to
decodetree)
8/35 Checking commit 80b7b0b6e041 (target/riscv: Convert RVXI csr insns to
decodetree)
9/35 Checking commit c2032943b671 (target/riscv: Convert RVXM insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#48:
new file mode 100644
total: 0 errors, 1 warnings, 145 lines checked
Patch 9/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/35 Checking commit 18db9d7cbe2a (target/riscv: Convert RV32A insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#54:
new file mode 100644
total: 0 errors, 1 warnings, 188 lines checked
Patch 10/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
11/35 Checking commit 101b3708d75e (target/riscv: Convert RV64A insns to
decodetree)
12/35 Checking commit 6ff19f1f6274 (target/riscv: Convert RV32F insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#78:
new file mode 100644
total: 0 errors, 1 warnings, 397 lines checked
Patch 12/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
13/35 Checking commit dbb77cd4df54 (target/riscv: Convert RV64F insns to
decodetree)
14/35 Checking commit 7181a4f9463b (target/riscv: Convert RV32D insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#51:
new file mode 100644
total: 0 errors, 1 warnings, 353 lines checked
Patch 14/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
15/35 Checking commit b78a5409c29d (target/riscv: Convert RV64D insns to
decodetree)
16/35 Checking commit 2d8731dad167 (target/riscv: Convert RV priv insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41:
new file mode 100644
total: 0 errors, 1 warnings, 214 lines checked
Patch 16/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/35 Checking commit 6a9048707730 (target/riscv: Convert quadrant 0 of RVXC
insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#31:
new file mode 100644
ERROR: externs should be avoided in .c files
#246: FILE: target/riscv/translate.c:983:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);
total: 1 errors, 1 warnings, 227 lines checked
Patch 17/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
18/35 Checking commit 27b3303efa77 (target/riscv: Convert quadrant 1 of RVXC
insns to decodetree)
19/35 Checking commit 7ea527626d72 (target/riscv: Convert quadrant 2 of RVXC
insns to decodetree)
20/35 Checking commit 047f3d2ee462 (target/riscv: Remove gen_jalr())
21/35 Checking commit ea820228141b (target/riscv: Remove manual decoding from
gen_branch())
22/35 Checking commit 30bef8034bd6 (target/riscv: Remove manual decoding from
gen_load())
23/35 Checking commit efebe9125f0c (target/riscv: Remove manual decoding from
gen_store())
24/35 Checking commit a4fde90aab86 (target/riscv: Move gen_arith_imm() decoding
into trans_* functions)
25/35 Checking commit 236a600baf26 (target/riscv: make ADD/SUB/OR/XOR/AND insn
use arg lists)
26/35 Checking commit 0fc287193b96 (target/riscv: Remove shift and slt insn
manual decoding)
27/35 Checking commit 3f07a91951e7 (target/riscv: Remove manual decoding of
RV32/64M insn)
28/35 Checking commit 5710f6d87168 (target/riscv: Rename trans_arith to
gen_arith)
29/35 Checking commit 30f9d142a0d7 (target/riscv: Remove gen_system())
30/35 Checking commit 0a0a43441c43 (target/riscv: Remove decode_RV32_64G())
31/35 Checking commit c57a58171416 (target/riscv: Convert @cs_2 insns to share
translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#42:
new file mode 100644
ERROR: externs should be avoided in .c files
#182: FILE: target/riscv/translate.c:497:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);
total: 1 errors, 1 warnings, 164 lines checked
Patch 31/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
32/35 Checking commit aa0f8ada6393 (target/riscv: Convert @cl_d, @cl_w, @cs_d,
@cs_w insns)
33/35 Checking commit e2d25e9d5539 (target/riscv: Splice fsw_sd and flw_ld for
riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#28:
new file mode 100644
total: 0 errors, 1 warnings, 287 lines checked
Patch 33/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
34/35 Checking commit c563ab1ecbf8 (target/riscv: Splice remaining compressed
insn pairs for riscv32 vs riscv64)
35/35 Checking commit 8fff3fc6a21e (target/riscv: Remaining rvc insn reuse 32
bit translators)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/address@hidden/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to address@hidden
- [Qemu-devel] [PATCH v5 01/35] target/riscv: Move CPURISCVState pointer to DisasContext, (continued)
- [Qemu-devel] [PATCH v5 01/35] target/riscv: Move CPURISCVState pointer to DisasContext, Bastian Koppelmann, 2019/01/22
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, Richard Henderson, 2019/01/22
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, Bastian Koppelmann, 2019/01/23
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, Palmer Dabbelt, 2019/01/25
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, Bastian Koppelmann, 2019/01/26
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, Palmer Dabbelt, 2019/01/29
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, Alistair Francis, 2019/01/29
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, Bastian Koppelmann, 2019/01/30
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, Palmer Dabbelt, 2019/01/30
Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree,
no-reply <=
Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31