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Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree
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Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree |
Date: |
Thu, 31 Jan 2019 13:11:08 -0800 (PST) |
Patchew URL: https://patchew.org/QEMU/address@hidden/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: address@hidden
Subject: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
- [tag update] patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
b5d179a target/riscv: Remaining rvc insn reuse 32 bit translators
89632ce target/riscv: Splice remaining compressed insn pairs for riscv32 vs
riscv64
2a407bf target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
82081be target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
e17dd90 target/riscv: Convert @cs_2 insns to share translation functions
39402d7 target/riscv: Remove decode_RV32_64G()
e168704 target/riscv: Remove gen_system()
925f796 target/riscv: Rename trans_arith to gen_arith
ce11a2d target/riscv: Remove manual decoding of RV32/64M insn
819cbda target/riscv: Remove shift and slt insn manual decoding
6de3ea8 target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
ac209c8 target/riscv: Move gen_arith_imm() decoding into trans_* functions
e6c57d7 target/riscv: Remove manual decoding from gen_store()
6e32a22 target/riscv: Remove manual decoding from gen_load()
fc2febc target/riscv: Remove manual decoding from gen_branch()
24ffd31 target/riscv: Remove gen_jalr()
ecb0b58 target/riscv: Convert quadrant 2 of RVXC insns to decodetree
7ce9e53 target/riscv: Convert quadrant 1 of RVXC insns to decodetree
2cf65e2 target/riscv: Convert quadrant 0 of RVXC insns to decodetree
ae6f285 target/riscv: Convert RV priv insns to decodetree
9c31e4f target/riscv: Convert RV64D insns to decodetree
5e73a24 target/riscv: Convert RV32D insns to decodetree
62b38c1 target/riscv: Convert RV64F insns to decodetree
4a7251e target/riscv: Convert RV32F insns to decodetree
cff510f target/riscv: Convert RV64A insns to decodetree
180d186 target/riscv: Convert RV32A insns to decodetree
bf22444 target/riscv: Convert RVXM insns to decodetree
a324468 target/riscv: Convert RVXI csr insns to decodetree
e4cb753 target/riscv: Convert RVXI fence insns to decodetree
851fff8 target/riscv: Convert RVXI arithmetic insns to decodetree
b806b20 target/riscv: Convert RV64I load/store insns to decodetree
ca745cb target/riscv: Convert RV32I load/store insns to decodetree
850511d target/riscv: Convert RVXI branch insns to decodetree
812f4fb target/riscv: Activate decodetree and implemnt LUI & AUIPC
40371d8 target/riscv: Move CPURISCVState pointer to DisasContext
=== OUTPUT BEGIN ===
1/35 Checking commit 40371d802c19 (target/riscv: Move CPURISCVState pointer to
DisasContext)
2/35 Checking commit 812f4fb0e12e (target/riscv: Activate decodetree and
implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34:
new file mode 100644
ERROR: externs should be avoided in .c files
#125: FILE: target/riscv/translate.c:1687:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);
total: 1 errors, 1 warnings, 125 lines checked
Patch 2/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
3/35 Checking commit 850511d47ca4 (target/riscv: Convert RVXI branch insns to
decodetree)
4/35 Checking commit ca745cbfa171 (target/riscv: Convert RV32I load/store insns
to decodetree)
5/35 Checking commit b806b20de230 (target/riscv: Convert RV64I load/store insns
to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#39:
new file mode 100644
total: 0 errors, 1 warnings, 76 lines checked
Patch 5/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/35 Checking commit 851fff88fc5c (target/riscv: Convert RVXI arithmetic insns
to decodetree)
7/35 Checking commit e4cb753f663e (target/riscv: Convert RVXI fence insns to
decodetree)
8/35 Checking commit a3244685ea17 (target/riscv: Convert RVXI csr insns to
decodetree)
9/35 Checking commit bf2244449406 (target/riscv: Convert RVXM insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#48:
new file mode 100644
total: 0 errors, 1 warnings, 145 lines checked
Patch 9/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/35 Checking commit 180d186fed80 (target/riscv: Convert RV32A insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#54:
new file mode 100644
total: 0 errors, 1 warnings, 188 lines checked
Patch 10/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
11/35 Checking commit cff510f04bf0 (target/riscv: Convert RV64A insns to
decodetree)
12/35 Checking commit 4a7251e72df0 (target/riscv: Convert RV32F insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#78:
new file mode 100644
total: 0 errors, 1 warnings, 397 lines checked
Patch 12/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
13/35 Checking commit 62b38c11f073 (target/riscv: Convert RV64F insns to
decodetree)
14/35 Checking commit 5e73a245d405 (target/riscv: Convert RV32D insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#51:
new file mode 100644
total: 0 errors, 1 warnings, 353 lines checked
Patch 14/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
15/35 Checking commit 9c31e4fb05a1 (target/riscv: Convert RV64D insns to
decodetree)
16/35 Checking commit ae6f285826c0 (target/riscv: Convert RV priv insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41:
new file mode 100644
total: 0 errors, 1 warnings, 214 lines checked
Patch 16/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/35 Checking commit 2cf65e25d0a3 (target/riscv: Convert quadrant 0 of RVXC
insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#31:
new file mode 100644
ERROR: externs should be avoided in .c files
#246: FILE: target/riscv/translate.c:983:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);
total: 1 errors, 1 warnings, 227 lines checked
Patch 17/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
18/35 Checking commit 7ce9e53aaeab (target/riscv: Convert quadrant 1 of RVXC
insns to decodetree)
19/35 Checking commit ecb0b58ef290 (target/riscv: Convert quadrant 2 of RVXC
insns to decodetree)
20/35 Checking commit 24ffd31f260b (target/riscv: Remove gen_jalr())
21/35 Checking commit fc2febc2de23 (target/riscv: Remove manual decoding from
gen_branch())
22/35 Checking commit 6e32a22cc246 (target/riscv: Remove manual decoding from
gen_load())
23/35 Checking commit e6c57d70f019 (target/riscv: Remove manual decoding from
gen_store())
24/35 Checking commit ac209c850750 (target/riscv: Move gen_arith_imm() decoding
into trans_* functions)
25/35 Checking commit 6de3ea822041 (target/riscv: make ADD/SUB/OR/XOR/AND insn
use arg lists)
26/35 Checking commit 819cbda0d1bf (target/riscv: Remove shift and slt insn
manual decoding)
27/35 Checking commit ce11a2d977ab (target/riscv: Remove manual decoding of
RV32/64M insn)
28/35 Checking commit 925f796a5d0f (target/riscv: Rename trans_arith to
gen_arith)
29/35 Checking commit e168704ef0df (target/riscv: Remove gen_system())
30/35 Checking commit 39402d7cf28f (target/riscv: Remove decode_RV32_64G())
31/35 Checking commit e17dd909d236 (target/riscv: Convert @cs_2 insns to share
translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#42:
new file mode 100644
ERROR: externs should be avoided in .c files
#182: FILE: target/riscv/translate.c:497:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);
total: 1 errors, 1 warnings, 164 lines checked
Patch 31/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
32/35 Checking commit 82081bebf6d0 (target/riscv: Convert @cl_d, @cl_w, @cs_d,
@cs_w insns)
33/35 Checking commit 2a407bf78c52 (target/riscv: Splice fsw_sd and flw_ld for
riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#28:
new file mode 100644
total: 0 errors, 1 warnings, 287 lines checked
Patch 33/35 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
34/35 Checking commit 89632ce033c5 (target/riscv: Splice remaining compressed
insn pairs for riscv32 vs riscv64)
35/35 Checking commit b5d179aad0b5 (target/riscv: Remaining rvc insn reuse 32
bit translators)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/address@hidden/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to address@hidden
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, (continued)
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree,
no-reply <=
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31
- Re: [Qemu-devel] [PATCH v5 00/35] target/riscv: Convert to decodetree, no-reply, 2019/01/31