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[Qemu-devel] [PULL 26/47] target/arm/translate-a64: Don't underdecode PR
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 26/47] target/arm/translate-a64: Don't underdecode PRFM |
Date: |
Fri, 1 Feb 2019 16:06:32 +0000 |
The PRFM prefetch insn in the load/store with imm9 encodings
requires idx field 0b00; we were underdecoding this by
only checking !is_unpriv (which is equivalent to idx != 2).
Correctly UNDEF the unallocated encodings where idx == 0b01
and 0b11 as well as 0b10.
Reported-by: Laurent Desnogues <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Laurent Desnogues <address@hidden>
Message-id: address@hidden
---
target/arm/translate-a64.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index e6df303e321..8e081758e03 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -2803,7 +2803,7 @@ static void disas_ldst_reg_imm9(DisasContext *s, uint32_t
insn,
} else {
if (size == 3 && opc == 2) {
/* PRFM - prefetch */
- if (is_unpriv) {
+ if (idx != 0) {
unallocated_encoding(s);
return;
}
--
2.20.1
- [Qemu-devel] [PULL 10/47] hw/arm/armsse: Make number of SRAM banks parameterised, (continued)
- [Qemu-devel] [PULL 10/47] hw/arm/armsse: Make number of SRAM banks parameterised, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 16/47] hw/arm/armsse: Add unimplemented-device stubs for MHUs, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 39/47] target/arm: Always enable pac keys for user-only, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 09/47] hw/misc/iotkit-secctl: Support 4 internal MPCs, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 24/47] hw/arm/mps2-tz: Add mps2-an521 model, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 43/47] target/arm: fix AArch64 virtual address space size, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 44/47] target/arm: fix decoding of B{, L}RA{A, B}, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 26/47] target/arm/translate-a64: Don't underdecode PRFM,
Peter Maydell <=
- [Qemu-devel] [PULL 11/47] hw/arm/armsse: Make SRAM bank size configurable, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 20/47] hw/misc/armsse-cpuid: Implement SSE-200 CPU_IDENTITY register block, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 47/47] tests/microbit-test: Add tests for nRF51 NVMC, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 36/47] target/arm: Add a timer to predict PMU counter overflow, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 12/47] hw/arm/armsse: Support dual-CPU configuration, Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 38/47] arm: Clarify the logic of set_pc(), Peter Maydell, 2019/02/01
- [Qemu-devel] [PULL 45/47] hw/nvram/nrf51_nvm: Add nRF51 non-volatile memories, Peter Maydell, 2019/02/01
- Re: [Qemu-devel] [PULL 00/47] target-arm queue, Peter Maydell, 2019/02/01
- Re: [Qemu-devel] [PULL 00/47] target-arm queue, no-reply, 2019/02/03