[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 14/37] spapr/pci: Fix primary bus number for PCI brid
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 14/37] spapr/pci: Fix primary bus number for PCI bridges |
Date: |
Mon, 4 Feb 2019 20:01:01 +1100 |
From: David Hildenbrand <address@hidden>
While looking at the s390x implementation, looks like spapr has a
similar BUG when building the topology.
The primary bus number corresponds always to the bus number of the
bus the bridge is attached to.
Right now, if we have two bridges attached to the same bus (e.g. root
bus) this is however not the case. The first bridge will have primary
bus 0, the second bridge primary bus 1, which is wrong. Fix the assignment.
While at it, drop setting the PCI_SUBORDINATE_BUS temporarily to 0xff.
Setting it temporarily to that value (as discussed e.g. in [1]), is
only relevant for a running system that probes the buses. The value is
effectively unused for us just doing a DFS.
[1] http://www.science.unitn.it/~fiorella/guidelinux/tlk/node76.html
Signed-off-by: David Hildenbrand <address@hidden>
Reviewed-by: Alexey Kardashevskiy <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/spapr_pci.c | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index b74f2632ec..5cdc98513d 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -2030,8 +2030,6 @@ static void spapr_phb_pci_enumerate_bridge(PCIBus *bus,
PCIDevice *pdev,
void *opaque)
{
unsigned int *bus_no = opaque;
- unsigned int primary = *bus_no;
- unsigned int subordinate = 0xff;
PCIBus *sec_bus = NULL;
if ((pci_default_read_config(pdev, PCI_HEADER_TYPE, 1) !=
@@ -2040,7 +2038,7 @@ static void spapr_phb_pci_enumerate_bridge(PCIBus *bus,
PCIDevice *pdev,
}
(*bus_no)++;
- pci_default_write_config(pdev, PCI_PRIMARY_BUS, primary, 1);
+ pci_default_write_config(pdev, PCI_PRIMARY_BUS, pci_dev_bus_num(pdev), 1);
pci_default_write_config(pdev, PCI_SECONDARY_BUS, *bus_no, 1);
pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, *bus_no, 1);
@@ -2049,7 +2047,6 @@ static void spapr_phb_pci_enumerate_bridge(PCIBus *bus,
PCIDevice *pdev,
return;
}
- pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, subordinate, 1);
pci_for_each_device(sec_bus, pci_bus_num(sec_bus),
spapr_phb_pci_enumerate_bridge, bus_no);
pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, *bus_no, 1);
--
2.20.1
- [Qemu-devel] [PULL 00/37] ppc-for-4.0 queue 20190204, David Gibson, 2019/02/04
- [Qemu-devel] [PULL 03/37] sam460ex: Clean up SPD EEPROM creation, David Gibson, 2019/02/04
- [Qemu-devel] [PULL 14/37] spapr/pci: Fix primary bus number for PCI bridges,
David Gibson <=
- [Qemu-devel] [PULL 09/37] target/ppc/kvm: Drop useless include directive, David Gibson, 2019/02/04
- [Qemu-devel] [PULL 10/37] ppc440: Avoid reporting error when reading non-existent RAM slot, David Gibson, 2019/02/04
- [Qemu-devel] [PULL 02/37] smbus: Add a helper to generate SPD EEPROM data, David Gibson, 2019/02/04
- [Qemu-devel] [PULL 27/37] target/ppc: rework vmrg{l, h}{b, h, w} instructions to use Vsr* macros, David Gibson, 2019/02/04
- [Qemu-devel] [PULL 11/37] spapr/vio: remove the "irq" property", David Gibson, 2019/02/04
- [Qemu-devel] [PULL 08/37] ppc/xive: fix remaining XiveFabric names, David Gibson, 2019/02/04
- [Qemu-devel] [PULL 13/37] spapr: Forbid setting ic-mode for old machine types, David Gibson, 2019/02/04
- [Qemu-devel] [PULL 05/37] ppc4xx: Rename ppc4xx_sdram_t in ppc440_uc.c to ppc440_sdram_t, David Gibson, 2019/02/04
- [Qemu-devel] [PULL 19/37] ppc: remove the interrupt presenters from under PowerPCCPU, David Gibson, 2019/02/04
- [Qemu-devel] [PULL 18/37] target/ppc: implement complete set of Vsr* macros, David Gibson, 2019/02/04