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[Qemu-devel] [PULL 00/16] target-arm queue
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 00/16] target-arm queue |
Date: |
Thu, 28 Feb 2019 11:08:19 +0000 |
The following changes since commit adf2e451f357e993f173ba9b4176dbf3e65fee7e:
Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging
(2019-02-26 19:04:47 +0000)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20190228-1
for you to fetch changes up to 1c9af3a9e05c1607a36df4943f8f5393d7621a91:
linux-user: Enable HWCAP_ASIMDFHM, HWCAP_JSCVT (2019-02-28 11:03:05 +0000)
----------------------------------------------------------------
target-arm queue:
* add MHU and dual-core support to Musca boards
* refactor some VFP insns to be gated by ID registers
* Revert "arm: Allow system registers for KVM guests to be changed by QEMU
code"
* Implement ARMv8.2-FHM extension
* Advertise JSCVT via HWCAP for linux-user
----------------------------------------------------------------
Peter Maydell (11):
hw/misc/armsse-mhu.c: Model the SSE-200 Message Handling Unit
hw/arm/armsse: Wire up the MHUs
target/arm/cpu: Allow init-svtor property to be set after realize
target/arm/arm-powerctl: Add new arm_set_cpu_on_and_reset()
hw/misc/iotkit-sysctl: Correct typo in INITSVTOR0 register name
hw/arm/iotkit-sysctl: Add SSE-200 registers
hw/arm/iotkit-sysctl: Implement CPUWAIT and INITSVTOR*
hw/arm/armsse: Unify init-svtor and cpuwait handling
target/arm: Use MVFR1 feature bits to gate A32/T32 FP16 instructions
target/arm: Gate "miscellaneous FP" insns by ID register field
Revert "arm: Allow system registers for KVM guests to be changed by QEMU
code"
Richard Henderson (5):
target/arm: Add helpers for FMLAL
target/arm: Implement FMLAL and FMLSL for aarch64
target/arm: Implement VFMAL and VFMSL for aarch32
target/arm: Enable ARMv8.2-FHM for -cpu max
linux-user: Enable HWCAP_ASIMDFHM, HWCAP_JSCVT
hw/misc/Makefile.objs | 1 +
include/hw/arm/armsse.h | 3 +-
include/hw/misc/armsse-mhu.h | 44 ++++++
include/hw/misc/iotkit-sysctl.h | 25 +++-
target/arm/arm-powerctl.h | 16 +++
target/arm/cpu.h | 76 +++++++++--
target/arm/helper.h | 9 ++
hw/arm/armsse.c | 91 +++++++++----
hw/misc/armsse-mhu.c | 198 +++++++++++++++++++++++++++
hw/misc/iotkit-sysctl.c | 294 ++++++++++++++++++++++++++++++++++++++--
linux-user/elfload.c | 2 +
target/arm/arm-powerctl.c | 56 ++++++++
target/arm/cpu.c | 32 ++++-
target/arm/cpu64.c | 2 +
target/arm/helper.c | 27 +---
target/arm/kvm32.c | 23 +++-
target/arm/kvm64.c | 2 -
target/arm/machine.c | 2 +-
target/arm/translate-a64.c | 49 ++++++-
target/arm/translate.c | 180 ++++++++++++++++--------
target/arm/vec_helper.c | 148 ++++++++++++++++++++
MAINTAINERS | 2 +
default-configs/arm-softmmu.mak | 1 +
hw/misc/trace-events | 4 +
24 files changed, 1139 insertions(+), 148 deletions(-)
create mode 100644 include/hw/misc/armsse-mhu.h
create mode 100644 hw/misc/armsse-mhu.c
- [Qemu-devel] [PULL 00/16] target-arm queue,
Peter Maydell <=
- [Qemu-devel] [PULL 04/16] target/arm/arm-powerctl: Add new arm_set_cpu_on_and_reset(), Peter Maydell, 2019/02/28
- [Qemu-devel] [PULL 05/16] hw/misc/iotkit-sysctl: Correct typo in INITSVTOR0 register name, Peter Maydell, 2019/02/28
- [Qemu-devel] [PULL 03/16] target/arm/cpu: Allow init-svtor property to be set after realize, Peter Maydell, 2019/02/28
- [Qemu-devel] [PULL 01/16] hw/misc/armsse-mhu.c: Model the SSE-200 Message Handling Unit, Peter Maydell, 2019/02/28
- [Qemu-devel] [PULL 06/16] hw/arm/iotkit-sysctl: Add SSE-200 registers, Peter Maydell, 2019/02/28
- [Qemu-devel] [PULL 07/16] hw/arm/iotkit-sysctl: Implement CPUWAIT and INITSVTOR*, Peter Maydell, 2019/02/28
- [Qemu-devel] [PULL 02/16] hw/arm/armsse: Wire up the MHUs, Peter Maydell, 2019/02/28
- [Qemu-devel] [PULL 09/16] target/arm: Use MVFR1 feature bits to gate A32/T32 FP16 instructions, Peter Maydell, 2019/02/28
- [Qemu-devel] [PULL 08/16] hw/arm/armsse: Unify init-svtor and cpuwait handling, Peter Maydell, 2019/02/28
- [Qemu-devel] [PULL 10/16] target/arm: Gate "miscellaneous FP" insns by ID register field, Peter Maydell, 2019/02/28