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Re: [Qemu-devel] [PATCH 6/6] xen-pt: Round pci regions sizes to XEN_PAGE
From: |
Simon Gaiser |
Subject: |
Re: [Qemu-devel] [PATCH 6/6] xen-pt: Round pci regions sizes to XEN_PAGE_SIZE |
Date: |
Thu, 14 Mar 2019 21:45:26 +0100 |
Jason Andryuk:
> On Wed, Mar 13, 2019 at 11:09 AM Paul Durrant <address@hidden> wrote:
>>
>>> -----Original Message-----
>>> From: Jason Andryuk [mailto:address@hidden
>>> Sent: 11 March 2019 18:02
>>> To: address@hidden
>>> Cc: address@hidden; address@hidden; Simon Gaiser
>>> <address@hidden>; Jason Andryuk <address@hidden>; Stefano Stabellini
>>> <address@hidden>; Anthony Perard <address@hidden>; Paul Durrant
>>> <address@hidden>
>>> Subject: [PATCH 6/6] xen-pt: Round pci regions sizes to XEN_PAGE_SIZE
>>>
>>> From: Simon Gaiser <address@hidden>
>>>
>>> If a pci memory region has a size < XEN_PAGE_SIZE it can get located at
>>> an address which is not page aligned.
>>
>> IIRC the PCI spec says that the minimum memory region size should be at
>> least 4k. Should we even be tolerating BARs smaller than that?
>>
>> Paul
>>
>
> Hi, Paul.
>
> Simon found this, so it affects a real device. Simon, do you recall
> which device was affected?
>
> I think BARs only need to be power-of-two size and aligned, and 4k is
> not a minimum. 16bytes may be a minimum, but I don't know what the
> spec says.
>
> On an Ivy Bridge system, here are some of the devices with BARs smaller than
> 4K:
> 00:16.0 Communication controller: Intel Corporation 7 Series/C210
> Series Chipset Family MEI Controller #1 (rev 04)
> Memory at d0735000 (64-bit, non-prefetchable) [disabled] [size=16]
> 00:1d.0 USB controller: Intel Corporation 7 Series/C210 Series Chipset
> Family USB Enhanced Host Controller #1 (rev 04) (prog-if 20 [EHCI])
> Memory at d0739000 (32-bit, non-prefetchable) [disabled] [size=1K]
> 00:1f.3 SMBus: Intel Corporation 7 Series/C210 Series Chipset Family
> SMBus Controller (rev 04)
> Memory at d0734000 (64-bit, non-prefetchable) [disabled] [size=256]
> 02:00.0 System peripheral: JMicron Technology Corp. SD/MMC Host
> Controller (rev 30)
> Memory at d0503000 (32-bit, non-prefetchable) [disabled] [size=256]
>
> These examples are all 4K aligned, so this is not an issue on this machine.
I wrote this patch quite some time ago, so I might be misremembering
something but IIRC the problem was the address qemu allocates with
memory_region_init_io(). I.e. the address as seen from inside the VM, so
it does not help if the real address is aligned.
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- [Qemu-devel] [PATCH 2/6] xen: Move xenstore initialization to common location, (continued)
- [Qemu-devel] [PATCH 6/6] xen-pt: Round pci regions sizes to XEN_PAGE_SIZE, Jason Andryuk, 2019/03/11
- Re: [Qemu-devel] [PATCH 6/6] xen-pt: Round pci regions sizes to XEN_PAGE_SIZE,
Simon Gaiser <=
- Re: [Qemu-devel] [PATCH 6/6] xen-pt: Round pci regions sizes to XEN_PAGE_SIZE, Paul Durrant, 2019/03/15
- Re: [Qemu-devel] [Xen-devel] [PATCH 6/6] xen-pt: Round pci regions sizes to XEN_PAGE_SIZE, Andrew Cooper, 2019/03/15
- Re: [Qemu-devel] [Xen-devel] [PATCH 6/6] xen-pt: Round pci regions sizes to XEN_PAGE_SIZE, Jason Andryuk, 2019/03/20
- Re: [Qemu-devel] [Xen-devel] [PATCH 6/6] xen-pt: Round pci regions sizes to XEN_PAGE_SIZE, Roger Pau Monné, 2019/03/21
- Re: [Qemu-devel] [Xen-devel] [PATCH 6/6] xen-pt: Round pci regions sizes to XEN_PAGE_SIZE, Jason Andryuk, 2019/03/22