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Re: [Qemu-devel] [Qemu-ppc] [RFC for-4.1 16/25] target/ppc: Style fixes
From: |
Greg Kurz |
Subject: |
Re: [Qemu-devel] [Qemu-ppc] [RFC for-4.1 16/25] target/ppc: Style fixes for mmu-hash32.[ch] |
Date: |
Mon, 25 Mar 2019 09:45:11 +0100 |
On Fri, 22 Mar 2019 11:15:35 +1100
David Gibson <address@hidden> wrote:
> Signed-off-by: David Gibson <address@hidden>
> ---
> target/ppc/mmu-hash32.c | 19 ++++++++++++-------
> 1 file changed, 12 insertions(+), 7 deletions(-)
>
> diff --git a/target/ppc/mmu-hash32.c b/target/ppc/mmu-hash32.c
> index e8562a7c87..f83944b78c 100644
> --- a/target/ppc/mmu-hash32.c
> +++ b/target/ppc/mmu-hash32.c
> @@ -27,7 +27,7 @@
> #include "mmu-hash32.h"
> #include "exec/log.h"
>
> -//#define DEBUG_BAT
> +/* #define DEBUG_BAT */
>
> #ifdef DEBUG_BATS
> # define LOG_BATS(...) qemu_log_mask(CPU_LOG_MMU, __VA_ARGS__)
> @@ -228,8 +228,10 @@ static int ppc_hash32_direct_store(PowerPCCPU *cpu,
> target_ulong sr,
> qemu_log_mask(CPU_LOG_MMU, "direct store...\n");
>
> if ((sr & 0x1FF00000) >> 20 == 0x07f) {
> - /* Memory-forced I/O controller interface access */
> - /* If T=1 and BUID=x'07F', the 601 performs a memory access
> + /*
> + * Memory-forced I/O controller interface access
> + *
> + * If T=1 and BUID=x'07F', the 601 performs a memory access
> * to SR[28-31] LA[4-31], bypassing all protection mechanisms.
> */
> *raddr = ((sr & 0xF) << 28) | (eaddr & 0x0FFFFFFF);
> @@ -266,8 +268,9 @@ static int ppc_hash32_direct_store(PowerPCCPU *cpu,
> target_ulong sr,
> return 1;
> case ACCESS_CACHE:
> /* dcba, dcbt, dcbtst, dcbf, dcbi, dcbst, dcbz, or icbi */
> - /* Should make the instruction do no-op.
> - * As it already do no-op, it's quite easy :-)
> + /*
> + * Should make the instruction do no-op. As it already do
> + * no-op, it's quite easy :-)
> */
Maybe make it:
/*
* dcba, dcbt, dcbtst, dcbf, dcbi, dcbst, dcbz, or icbi
*
* Should make the instruction do no-op. As it already do
* no-op, it's quite easy :-)
*/
> *raddr = eaddr;
> return 0;
> @@ -519,8 +522,10 @@ int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr
> eaddr, int rwx,
> if (rwx == 1) {
> new_pte1 |= HPTE32_R_C; /* set changed (dirty) bit */
> } else {
> - /* Treat the page as read-only for now, so that a later write
> - * will pass through this function again to set the C bit */
> + /*
> + * Treat the page as read-only for now, so that a later write
> + * will pass through this function again to set the C bit
> + */
> prot &= ~PAGE_WRITE;
> }
>
- Re: [Qemu-devel] [Qemu-ppc] [RFC for-4.1 21/25] target/ppc: Style fixes for translate.c, (continued)
- [Qemu-devel] [RFC for-4.1 19/25] target/ppc: Style fixes for monitor.c, David Gibson, 2019/03/21
- [Qemu-devel] [RFC for-4.1 23/25] target/ppc: Style fixes for translate/vsx-impl.inc.c, David Gibson, 2019/03/21
- [Qemu-devel] [RFC for-4.1 22/25] target/ppc: Style fixes for translate/fp-impl.inc.c, David Gibson, 2019/03/21
- [Qemu-devel] [RFC for-4.1 16/25] target/ppc: Style fixes for mmu-hash32.[ch], David Gibson, 2019/03/21
- [Qemu-devel] [RFC for-4.1 14/25] target/ppc: Style fixes for mfrom_table.inc.c & mfrom_table_gen.c, David Gibson, 2019/03/21
- [Qemu-devel] [RFC for-4.1 15/25] target/ppc: Style fixes for misc_helper.c, David Gibson, 2019/03/21
- [Qemu-devel] [RFC for-4.1 24/25] target/ppc: Style fixes for translate/vmx-impl.inc.c, David Gibson, 2019/03/21
- [Qemu-devel] [RFC for-4.1 18/25] target/ppc: Style fixes for mmu_helper.c, David Gibson, 2019/03/21