Re: [Qemu-devel] [PATCH for-4.1 v2 21/36] target/riscv: Use env_cpu, env_archcpu

[Alistair Francis]

On Thu, Mar 28, 2019 at 4:30 PM Richard Henderson
<address@hidden> wrote:
>
> Signed-off-by: Richard Henderson <address@hidden>

Reviewed-by: Alistair Francis <address@hidden>

Alistair

> ---
>  target/riscv/cpu.h          |  5 -----
>  linux-user/riscv/cpu_loop.c |  2 +-
>  target/riscv/cpu_helper.c   |  4 ++--
>  target/riscv/csr.c          | 12 ++++++------
>  target/riscv/op_helper.c    |  8 ++++----
>  5 files changed, 13 insertions(+), 18 deletions(-)
>
> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> index e97f6c4889..c18dd5eb24 100644
> --- a/target/riscv/cpu.h
> +++ b/target/riscv/cpu.h
> @@ -211,11 +211,6 @@ typedef struct RISCVCPU {
>      CPURISCVState env;
>  } RISCVCPU;
>
> -static inline RISCVCPU *riscv_env_get_cpu(CPURISCVState *env)
> -{
> -    return container_of(env, RISCVCPU, env);
> -}
> -
>  static inline int riscv_has_ext(CPURISCVState *env, target_ulong ext)
>  {
>      return (env->misa & ext) != 0;
> diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_loop.c
> index 31700f75d0..c1134597fd 100644
> --- a/linux-user/riscv/cpu_loop.c
> +++ b/linux-user/riscv/cpu_loop.c
> @@ -25,7 +25,7 @@
>
>  void cpu_loop(CPURISCVState *env)
>  {
> -    CPUState *cs = CPU(riscv_env_get_cpu(env));
> +    CPUState *cs = env_cpu(env);
>      int trapnr, signum, sigcode;
>      target_ulong sigaddr;
>      target_ulong ret;
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index b17f169681..72f82c1ccf 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -191,7 +191,7 @@ static int get_physical_address(CPURISCVState *env, 
> hwaddr *physical,
>          }
>      }
>
> -    CPUState *cs = CPU(riscv_env_get_cpu(env));
> +    CPUState *cs = env_cpu(env);
>      int va_bits = PGSHIFT + levels * ptidxbits;
>      target_ulong mask = (1L << (TARGET_LONG_BITS - (va_bits - 1))) - 1;
>      target_ulong masked_msbs = (addr >> (va_bits - 1)) & mask;
> @@ -320,7 +320,7 @@ restart:
>  static void raise_mmu_exception(CPURISCVState *env, target_ulong address,
>                                  MMUAccessType access_type)
>  {
> -    CPUState *cs = CPU(riscv_env_get_cpu(env));
> +    CPUState *cs = env_cpu(env);
>      int page_fault_exceptions =
>          (env->priv_ver >= PRIV_VERSION_1_10_0) &&
>          get_field(env->satp, SATP_MODE) != VM_1_10_MBARE;
> diff --git a/target/riscv/csr.c b/target/riscv/csr.c
> index e1d91b6c60..97a4e10e3e 100644
> --- a/target/riscv/csr.c
> +++ b/target/riscv/csr.c
> @@ -296,7 +296,7 @@ static int write_mstatus(CPURISCVState *env, int csrno, 
> target_ulong val)
>      if (env->priv_ver <= PRIV_VERSION_1_09_1) {
>          if ((val ^ mstatus) & (MSTATUS_MXR | MSTATUS_MPP |
>                  MSTATUS_MPRV | MSTATUS_SUM | MSTATUS_VM)) {
> -            tlb_flush(CPU(riscv_env_get_cpu(env)));
> +            tlb_flush(env_cpu(env));
>          }
>          mask = MSTATUS_SIE | MSTATUS_SPIE | MSTATUS_MIE | MSTATUS_MPIE |
>              MSTATUS_SPP | MSTATUS_FS | MSTATUS_MPRV | MSTATUS_SUM |
> @@ -307,7 +307,7 @@ static int write_mstatus(CPURISCVState *env, int csrno, 
> target_ulong val)
>      if (env->priv_ver >= PRIV_VERSION_1_10_0) {
>          if ((val ^ mstatus) & (MSTATUS_MXR | MSTATUS_MPP |
>                  MSTATUS_MPRV | MSTATUS_SUM)) {
> -            tlb_flush(CPU(riscv_env_get_cpu(env)));
> +            tlb_flush(env_cpu(env));
>          }
>          mask = MSTATUS_SIE | MSTATUS_SPIE | MSTATUS_MIE | MSTATUS_MPIE |
>              MSTATUS_SPP | MSTATUS_FS | MSTATUS_MPRV | MSTATUS_SUM |
> @@ -382,7 +382,7 @@ static int write_misa(CPURISCVState *env, int csrno, 
> target_ulong val)
>
>      /* flush translation cache */
>      if (val != env->misa) {
> -        tb_flush(CPU(riscv_env_get_cpu(env)));
> +        tb_flush(env_cpu(env));
>      }
>
>      env->misa = val;
> @@ -549,7 +549,7 @@ static int write_mbadaddr(CPURISCVState *env, int csrno, 
> target_ulong val)
>  static int rmw_mip(CPURISCVState *env, int csrno, target_ulong *ret_value,
>                     target_ulong new_value, target_ulong write_mask)
>  {
> -    RISCVCPU *cpu = riscv_env_get_cpu(env);
> +    RISCVCPU *cpu = env_archcpu(env);
>      /* Allow software control of delegable interrupts not claimed by 
> hardware */
>      target_ulong mask = write_mask & delegable_ints & ~env->miclaim;
>      uint32_t old_mip;
> @@ -712,7 +712,7 @@ static int write_satp(CPURISCVState *env, int csrno, 
> target_ulong val)
>          return 0;
>      }
>      if (env->priv_ver <= PRIV_VERSION_1_09_1 && (val ^ env->sptbr)) {
> -        tlb_flush(CPU(riscv_env_get_cpu(env)));
> +        tlb_flush(env_cpu(env));
>          env->sptbr = val & (((target_ulong)
>              1 << (TARGET_PHYS_ADDR_SPACE_BITS - PGSHIFT)) - 1);
>      }
> @@ -723,7 +723,7 @@ static int write_satp(CPURISCVState *env, int csrno, 
> target_ulong val)
>          if (env->priv == PRV_S && get_field(env->mstatus, MSTATUS_TVM)) {
>              return -1;
>          } else {
> -            tlb_flush(CPU(riscv_env_get_cpu(env)));
> +            tlb_flush(env_cpu(env));
>              env->satp = val;
>          }
>      }
> diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c
> index b7dc18a41e..f078bafbe6 100644
> --- a/target/riscv/op_helper.c
> +++ b/target/riscv/op_helper.c
> @@ -28,7 +28,7 @@
>  void QEMU_NORETURN riscv_raise_exception(CPURISCVState *env,
>                                            uint32_t exception, uintptr_t pc)
>  {
> -    CPUState *cs = CPU(riscv_env_get_cpu(env));
> +    CPUState *cs = env_cpu(env);
>      qemu_log_mask(CPU_LOG_INT, "%s: %d\n", __func__, exception);
>      cs->exception_index = exception;
>      cpu_loop_exit_restore(cs, pc);
> @@ -128,7 +128,7 @@ target_ulong helper_mret(CPURISCVState *env, target_ulong 
> cpu_pc_deb)
>
>  void helper_wfi(CPURISCVState *env)
>  {
> -    CPUState *cs = CPU(riscv_env_get_cpu(env));
> +    CPUState *cs = env_cpu(env);
>
>      if (env->priv == PRV_S &&
>          env->priv_ver >= PRIV_VERSION_1_10_0 &&
> @@ -143,8 +143,8 @@ void helper_wfi(CPURISCVState *env)
>
>  void helper_tlb_flush(CPURISCVState *env)
>  {
> -    RISCVCPU *cpu = riscv_env_get_cpu(env);
> -    CPUState *cs = CPU(cpu);
> +    CPUState *cs = env_cpu(env);
> +
>      if (env->priv == PRV_S &&
>          env->priv_ver >= PRIV_VERSION_1_10_0 &&
>          get_field(env->mstatus, MSTATUS_TVM)) {
> --
> 2.17.1
>
>