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[Qemu-devel] [PATCH v7 0/6] target/mips: Optimize MSA interleave instruc
From: |
Mateja Marjanovic |
Subject: |
[Qemu-devel] [PATCH v7 0/6] target/mips: Optimize MSA interleave instructions |
Date: |
Wed, 17 Apr 2019 17:33:20 +0200 |
From: Mateja Marjanovic <address@hidden>
Optimize and refactor MSA instructions ILVEV.<B|H|W|D>,
ILVOD.<B|H|W|D>, ILVL.<B|H|W|D> and ILVR.<B|H|W|D>.
v7:
- Use tcg constants, instead of uint64_t constants in
ILVEV.<B|H> and ILVOD.<B|H> instructions.
- Refactor gen_ilvod_b and gen_ilvod_h functions. Use
the shared function gen_ilvod_bh, which has two extra
arguments mask and shift, because mask and shift are
the only differences in the implementation of those
two functions.
Same applies for gen_ilvev_b and gen_ilvev_h.
- Use assigning uint64_t constant values to the bit mask,
instead of shifting the bit mask, in ILVR.<H|W> and
ILVL.<H|W> instructions.
- Use only one helper for ILVEV.D and ILVR.D instructions,
because they are equivalent.
Same applies for ILVOD.D and ILVL.D.
- Minor changes in the commit messages.
v6:
- Add ILVL.<B|H|W|D> and ILVR.<B|H|W|D> MSA instructions
with mixed approaches (with helpers and with tcg
registers).
- Test the performance for ILVL.<B|H|W|D> and
ILVR.<B|H|W|D> MSA instructions, with helpers,
with tcg and with the mixed approach.
- Use a tcg register instead of an int variable for
storing a constant value of the mask (for logic
operations).
- Eliminate some unnecessary tcg_gen calls.
- Changes in commit messages and the cover letter.
v5:
- Use tcg_gen_deposit function.
- Added performance number for no-deposit and
with-deposit cases of ILVEV.W.
- Minor changes in commit messages and the cover letter.
v4:
- Clean up typing errors.
- Change the commit message and the cover letter.
- Fix bug for ILVEV.D, in case where the destination
and one of the sources are the same register.
v3:
- Reduce the number of logic operations to a
minimum.
- Add comments.
v2:
- Minor changes in commit messages and the cover letter.
Mateja Marjanovic (6):
target/mips: Optimize ILVOD.<B|H|W|D> MSA instructions
target/mips: Optimize ILVEV.<B|H|W|D> MSA instructions
target/mips: Optimize ILVL.<B|H|W|D> MSA instructions
target/mips: Optimize ILVR.<B|H|W|D> MSA instructions
target/mips: Merge implementation of ILVEV.D and ILVR.D
target/mips: Merge implementation of ILVOD.D and ILVL.D
target/mips/helper.h | 7 +-
target/mips/msa_helper.c | 82 +++++++----
target/mips/translate.c | 376 ++++++++++++++++++++++++++++++++++++++++++++++-
3 files changed, 425 insertions(+), 40 deletions(-)
--
2.7.4
- [Qemu-devel] [PATCH v7 0/6] target/mips: Optimize MSA interleave instructions,
Mateja Marjanovic <=
- [Qemu-devel] [PATCH v7 4/6] target/mips: Optimize ILVR.<B|H|W|D> MSA instructions, Mateja Marjanovic, 2019/04/17
- [Qemu-devel] [PATCH v7 1/6] target/mips: Optimize ILVOD.<B|H|W|D> MSA instructions, Mateja Marjanovic, 2019/04/17
- [Qemu-devel] [PATCH v7 3/6] target/mips: Optimize ILVL.<B|H|W|D> MSA instructions, Mateja Marjanovic, 2019/04/17
- [Qemu-devel] [PATCH v7 6/6] target/mips: Merge implementation of ILVOD.D and ILVL.D, Mateja Marjanovic, 2019/04/17
- [Qemu-devel] [PATCH v7 4/6] target/mips: Optimize ILVR.<B|H|W|D> MSA instructions, Mateja Marjanovic, 2019/04/17
- [Qemu-devel] [PATCH v7 2/6] target/mips: Optimize ILVEV.<B|H|W|D> MSA instructions, Mateja Marjanovic, 2019/04/17
- Re: [Qemu-devel] [PATCH v7 0/6] target/mips: Optimize MSA interleave instructions, Aleksandar Markovic, 2019/04/17