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[Qemu-devel] [PULL 13/15] tcg/ppc: Allow the constant pool to overflow a
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 13/15] tcg/ppc: Allow the constant pool to overflow at 32k |
Date: |
Fri, 26 Apr 2019 10:24:19 -0700 |
There is no point in coding for a 2GB offset when the max TB size
is already limited to 64k. If we further restrict to 32k then we
can eliminate the extra ADDIS instruction.
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/ppc/tcg-target.inc.c | 28 ++++++++++------------------
1 file changed, 10 insertions(+), 18 deletions(-)
diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c
index c0923ced4f..36b4791707 100644
--- a/tcg/ppc/tcg-target.inc.c
+++ b/tcg/ppc/tcg-target.inc.c
@@ -529,7 +529,6 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
intptr_t value, intptr_t addend)
{
tcg_insn_unit *target;
- tcg_insn_unit old;
value += addend;
target = (tcg_insn_unit *)value;
@@ -540,22 +539,16 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
case R_PPC_REL24:
return reloc_pc24(code_ptr, target);
case R_PPC_ADDR16:
- /* We are abusing this relocation type. This points to a pair
- of insns, addis + load. If the displacement is small, we
- can nop out the addis. */
- if (value == (int16_t)value) {
- code_ptr[0] = NOP;
- old = deposit32(code_ptr[1], 0, 16, value);
- code_ptr[1] = deposit32(old, 16, 5, TCG_REG_TB);
- } else {
- int16_t lo = value;
- int hi = value - lo;
- if (hi + lo != value) {
- return false;
- }
- code_ptr[0] = deposit32(code_ptr[0], 0, 16, hi >> 16);
- code_ptr[1] = deposit32(code_ptr[1], 0, 16, lo);
+ /*
+ * We are (slightly) abusing this relocation type. In particular,
+ * assert that the low 2 bits are zero, and do not modify them.
+ * That way we can use this with LD et al that have opcode bits
+ * in the low 2 bits of the insn.
+ */
+ if ((value & 3) || value != (int16_t)value) {
+ return false;
}
+ *code_ptr = (*code_ptr & ~0xfffc) | (value & 0xfffc);
break;
default:
g_assert_not_reached();
@@ -701,8 +694,7 @@ static void tcg_out_movi_int(TCGContext *s, TCGType type,
TCGReg ret,
if (!in_prologue && USE_REG_TB) {
new_pool_label(s, arg, R_PPC_ADDR16, s->code_ptr,
-(intptr_t)s->code_gen_ptr);
- tcg_out32(s, ADDIS | TAI(ret, TCG_REG_TB, 0));
- tcg_out32(s, LD | TAI(ret, ret, 0));
+ tcg_out32(s, LD | TAI(ret, TCG_REG_TB, 0));
return;
}
--
2.17.1
- [Qemu-devel] [PULL 04/15] tcg: Use extract2 in tcg_gen_deposit_{i32, i64}, (continued)
- [Qemu-devel] [PULL 04/15] tcg: Use extract2 in tcg_gen_deposit_{i32, i64}, Richard Henderson, 2019/04/26
- [Qemu-devel] [PULL 05/15] tcg/i386: Support INDEX_op_extract2_{i32, i64}, Richard Henderson, 2019/04/26
- [Qemu-devel] [PULL 02/15] tcg: Add INDEX_op_extract2_{i32,i64}, Richard Henderson, 2019/04/26
- [Qemu-devel] [PULL 06/15] tcg/arm: Support INDEX_op_extract2_i32, Richard Henderson, 2019/04/26
- [Qemu-devel] [PULL 07/15] tcg/aarch64: Support INDEX_op_extract2_{i32, i64}, Richard Henderson, 2019/04/26
- [Qemu-devel] [PULL 09/15] tcg: Restart after TB code generation overflow, Richard Henderson, 2019/04/26
- [Qemu-devel] [PULL 08/15] tcg: Hoist max_insns computation to tb_gen_code, Richard Henderson, 2019/04/26
- [Qemu-devel] [PULL 11/15] tcg: Restart TB generation after constant pool overflow, Richard Henderson, 2019/04/26
- [Qemu-devel] [PULL 10/15] tcg: Restart TB generation after relocation overflow, Richard Henderson, 2019/04/26
- [Qemu-devel] [PULL 12/15] tcg: Restart TB generation after out-of-line ldst overflow, Richard Henderson, 2019/04/26
- [Qemu-devel] [PULL 13/15] tcg/ppc: Allow the constant pool to overflow at 32k,
Richard Henderson <=
- [Qemu-devel] [PULL 14/15] tcg/arm: Restrict constant pool displacement to 12 bits, Richard Henderson, 2019/04/26
- [Qemu-devel] [PULL 15/15] cputlb: Fix io_readx() to respect the access_type, Richard Henderson, 2019/04/26
- Re: [Qemu-devel] [PULL 00/15] tcg patch queue, no-reply, 2019/04/26
- Re: [Qemu-devel] [PULL 00/15] tcg patch queue, Peter Maydell, 2019/04/28