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Re: [Qemu-devel] [PATCH 7/9] target/ppc: Fix vrlwmi and vrlwnm
From: |
David Gibson |
Subject: |
Re: [Qemu-devel] [PATCH 7/9] target/ppc: Fix vrlwmi and vrlwnm |
Date: |
Tue, 7 May 2019 15:30:31 +1000 |
User-agent: |
Mutt/1.11.4 (2019-03-13) |
On Tue, May 07, 2019 at 10:48:09AM +1000, Anton Blanchard wrote:
> We should only look at 5 bits of each byte, not 6.
>
> Fixes: 3e00884f4e9f ("target-ppc: add vrldnmi and vrlwmi instructions")
> Signed-off-by: Anton Blanchard <address@hidden>
Hrm. So, what lives in those extra bits in the 'w' instructions? Is
ignoring it correct? Should we throw an exception? Does it mean
something else?
> ---
> target/ppc/int_helper.c | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
> index fd715b4076..111586c981 100644
> --- a/target/ppc/int_helper.c
> +++ b/target/ppc/int_helper.c
> @@ -1652,7 +1652,7 @@ void helper_vrsqrtefp(CPUPPCState *env, ppc_avr_t *r,
> ppc_avr_t *b)
> }
> }
>
> -#define VRLMI(name, size, element, insert) \
> +#define VRLMI(name, size, element, insert, modifier_bits) \
> void helper_##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
> { \
> int i; \
> @@ -1662,9 +1662,9 @@ void helper_##name(ppc_avr_t *r, ppc_avr_t *a,
> ppc_avr_t *b) \
> uint##size##_t src3 = r->element[i]; \
> uint##size##_t begin, end, shift, mask, rot_val; \
> \
> - shift = extract##size(src2, 0, 6); \
> - end = extract##size(src2, 8, 6); \
> - begin = extract##size(src2, 16, 6); \
> + shift = extract##size(src2, 0, modifier_bits); \
> + end = extract##size(src2, 8, modifier_bits); \
> + begin = extract##size(src2, 16, modifier_bits); \
> rot_val = rol##size(src1, shift); \
> mask = mask_u##size(begin, end); \
> if (insert) { \
> @@ -1675,10 +1675,10 @@ void helper_##name(ppc_avr_t *r, ppc_avr_t *a,
> ppc_avr_t *b) \
> } \
> }
>
> -VRLMI(vrldmi, 64, u64, 1);
> -VRLMI(vrlwmi, 32, u32, 1);
> -VRLMI(vrldnm, 64, u64, 0);
> -VRLMI(vrlwnm, 32, u32, 0);
> +VRLMI(vrldmi, 64, u64, 1, 6);
> +VRLMI(vrlwmi, 32, u32, 1, 5);
> +VRLMI(vrldnm, 64, u64, 0, 6);
> +VRLMI(vrlwnm, 32, u32, 0, 5);
>
> void helper_vsel(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b,
> ppc_avr_t *c)
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- [Qemu-devel] [PATCH] target/ppc: Optimise VSX_LOAD_SCALAR_DS and VSX_VECTOR_LOAD_STORE, (continued)
Re: [Qemu-devel] [PATCH 4/9] target/ppc: Fix lxvw4x, lxvh8x and lxvb16x, Mark Cave-Ayland, 2019/05/10
- Re: [Qemu-devel] [PATCH 4/9] target/ppc: Fix lxvw4x, lxvh8x and lxvb16x, Anton Blanchard, 2019/05/21
- Re: [Qemu-devel] [PATCH 4/9] target/ppc: Fix lxvw4x, lxvh8x and lxvb16x, David Gibson, 2019/05/21
- Re: [Qemu-devel] [PATCH 4/9] target/ppc: Fix lxvw4x, lxvh8x and lxvb16x, Mark Cave-Ayland, 2019/05/22
- Re: [Qemu-devel] [PATCH 4/9] target/ppc: Fix lxvw4x, lxvh8x and lxvb16x, David Gibson, 2019/05/22
- Re: [Qemu-devel] [PATCH 4/9] target/ppc: Fix lxvw4x, lxvh8x and lxvb16x, Mark Cave-Ayland, 2019/05/24
Re: [Qemu-devel] [Qemu-ppc] [PATCH 4/9] target/ppc: Fix lxvw4x, lxvh8x and lxvb16x, Greg Kurz, 2019/05/22
[Qemu-devel] [PATCH 7/9] target/ppc: Fix vrlwmi and vrlwnm, Anton Blanchard, 2019/05/06
- Re: [Qemu-devel] [PATCH 7/9] target/ppc: Fix vrlwmi and vrlwnm,
David Gibson <=
[Qemu-devel] [PATCH 8/9] target/ppc: Fix dtstsfi and dtstsfiq, Anton Blanchard, 2019/05/06
[Qemu-devel] [PATCH 9/9] target/ppc: Fix vsum2sws, Anton Blanchard, 2019/05/06
[Qemu-devel] [PATCH 6/9] target/ppc: Fix vslv and vsrv, Anton Blanchard, 2019/05/06
Re: [Qemu-devel] [PATCH 1/9] target/ppc: Fix xvxsigdp, Alexey Kardashevskiy, 2019/05/06
Re: [Qemu-devel] [PATCH 1/9] target/ppc: Fix xvxsigdp, David Gibson, 2019/05/07