Re: [Qemu-devel] Question about the vfio device interrupt

[Alex Williamson]

On Wed, 15 May 2019 18:22:54 +0800
Li Qiang <address@hidden> wrote:

> Auger Eric <address@hidden> 于2019年5月15日周三 下午6:16写道：
> 
> > Hi,
> >
> > On 5/15/19 12:01 PM, Li Qiang wrote:  
> > > Hello Paolo, Alex and all,
> > >
> > > In vfio_intx_enable_kvm(qemu) I see we associate a resamplefd with the
> > > umask function(vfio_pci_intx_unmask_handler in linux).
> > >
> > >     irq_set = g_malloc0(argsz);
> > >     irq_set->argsz = argsz;
> > >     irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |  
> > VFIO_IRQ_SET_ACTION_UNMASK;  
> > >     irq_set->index = VFIO_PCI_INTX_IRQ_INDEX;
> > >     irq_set->start = 0;
> > >     irq_set->count = 1;
> > >     pfd = (int32_t *)&irq_set->data;
> > >
> > >     *pfd = irqfd.resamplefd;
> > >
> > >     ret = ioctl(vdev->vbasedev.fd, VFIO_DEVICE_SET_IRQS, irq_set);
> > >
> > > I know this resamplefd is triggered when the interrupt controller  
> > receives  
> > > an EOI and
> > > then we unmask and re-enabled the VFIO devices' interrupt.
> > >
> > > So I think there  there must be a mask process(so we unmask it later), I
> > > mean there must a
> > > call of function vfio_pci_set_intx_mask(in linux).
> > >
> > > What I can't understand is when this process(mask VFIO devices'  
> > interrupt)  
> > > occurs?  
> > It is done in the VFIO interrupt handler:
> > vfio_intx_handler/disable_irq_nosync for VFIO PCI (vfio_pci_intrs.c) or
> > vfio_automasked_irq_handler (vfio_platform_irq.c) for VFIO PLATFORM .
> >
> >  
> Thanks Eric,
> 
> Got it.
> I just forget to look at the interrupt handler(vfio_intx_handler)!

Importantly, PCI INTx interrupts are exposed in
VFIO_DEVICE_GET_IRQ_INFO with the VFIO_IRQ_INFO_AUTOMASKED flag which
indicates that the interrupt is masked in the host kernel when it is
signaled via the eventfd and userspace is only required to perform an
unmask operation to receive the next interrupt.  Thanks,

Alex