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[Qemu-devel] [PATCH 1/4] hw/intc/arm_gicv3: Fix decoding of ID register
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH 1/4] hw/intc/arm_gicv3: Fix decoding of ID register range |
Date: |
Mon, 20 May 2019 17:28:06 +0100 |
The GIC ID registers cover an area 0x30 bytes in size
(12 registers, 4 bytes each). We were incorrectly decoding
only the first 0x20 bytes.
Signed-off-by: Peter Maydell <address@hidden>
---
hw/intc/arm_gicv3_dist.c | 2 +-
hw/intc/arm_gicv3_redist.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/intc/arm_gicv3_dist.c b/hw/intc/arm_gicv3_dist.c
index 53c55c57291..335386ff3ac 100644
--- a/hw/intc/arm_gicv3_dist.c
+++ b/hw/intc/arm_gicv3_dist.c
@@ -533,7 +533,7 @@ static MemTxResult gicd_readl(GICv3State *s, hwaddr offset,
}
return MEMTX_OK;
}
- case GICD_IDREGS ... GICD_IDREGS + 0x1f:
+ case GICD_IDREGS ... GICD_IDREGS + 0x2f:
/* ID registers */
*data = gicv3_idreg(offset - GICD_IDREGS);
return MEMTX_OK;
diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c
index 3b0ba6de1ab..9bb11423382 100644
--- a/hw/intc/arm_gicv3_redist.c
+++ b/hw/intc/arm_gicv3_redist.c
@@ -233,7 +233,7 @@ static MemTxResult gicr_readl(GICv3CPUState *cs, hwaddr
offset,
}
*data = cs->gicr_nsacr;
return MEMTX_OK;
- case GICR_IDREGS ... GICR_IDREGS + 0x1f:
+ case GICR_IDREGS ... GICR_IDREGS + 0x2f:
*data = gicv3_idreg(offset - GICR_IDREGS);
return MEMTX_OK;
default:
--
2.20.1
- [Qemu-devel] [PATCH 0/4] hw/intc/arm_gicv3: Four simple bugfixes, Peter Maydell, 2019/05/20
- [Qemu-devel] [PATCH 2/4] hw/intc/arm_gicv3: GICD_TYPER.SecurityExtn is RAZ if GICD_CTLR.DS == 1, Peter Maydell, 2019/05/20
- [Qemu-devel] [PATCH 1/4] hw/intc/arm_gicv3: Fix decoding of ID register range,
Peter Maydell <=
- [Qemu-devel] [PATCH 3/4] hw/intc/arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1}, Peter Maydell, 2019/05/20
- [Qemu-devel] [PATCH 4/4] hw/intc/arm_gicv3: Fix writes to ICC_CTLR_EL3, Peter Maydell, 2019/05/20
- Re: [Qemu-devel] [PATCH 0/4] hw/intc/arm_gicv3: Four simple bugfixes, Peter Maydell, 2019/05/23