[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 02/12] target/arm: Simplify BFXIL expansion
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 02/12] target/arm: Simplify BFXIL expansion |
Date: |
Thu, 23 May 2019 15:23:47 +0100 |
From: Richard Henderson <address@hidden>
The mask implied by the extract is redundant with the one
implied by the deposit. Also, fix spelling of BFXIL.
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/translate-a64.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 2b135b938ce..42999c58011 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -4043,8 +4043,8 @@ static void disas_bitfield(DisasContext *s, uint32_t insn)
tcg_gen_extract_i64(tcg_rd, tcg_tmp, ri, len);
return;
}
- /* opc == 1, BXFIL fall through to deposit */
- tcg_gen_extract_i64(tcg_tmp, tcg_tmp, ri, len);
+ /* opc == 1, BFXIL fall through to deposit */
+ tcg_gen_shri_i64(tcg_tmp, tcg_tmp, ri);
pos = 0;
} else {
/* Handle the ri > si case with a deposit
@@ -4062,7 +4062,7 @@ static void disas_bitfield(DisasContext *s, uint32_t insn)
len = ri;
}
- if (opc == 1) { /* BFM, BXFIL */
+ if (opc == 1) { /* BFM, BFXIL */
tcg_gen_deposit_i64(tcg_rd, tcg_rd, tcg_tmp, pos, len);
} else {
/* SBFM or UBFM: We start with zero, and we haven't modified
--
2.20.1
- [Qemu-devel] [PULL 00/12] target-arm queue, Peter Maydell, 2019/05/23
- [Qemu-devel] [PULL 01/12] target/arm: Use extract2 for EXTR, Peter Maydell, 2019/05/23
- [Qemu-devel] [PULL 02/12] target/arm: Simplify BFXIL expansion,
Peter Maydell <=
- [Qemu-devel] [PULL 03/12] target/arm: Fix vector operation segfault, Peter Maydell, 2019/05/23
- [Qemu-devel] [PULL 04/12] arm: Move system_clock_scale to armv7m_systick.h, Peter Maydell, 2019/05/23
- [Qemu-devel] [PULL 05/12] arm: Remove unnecessary includes of hw/arm/arm.h, Peter Maydell, 2019/05/23
- [Qemu-devel] [PULL 11/12] hw/arm/exynos4210: Add DMA support for the Exynos4210, Peter Maydell, 2019/05/23
- [Qemu-devel] [PULL 07/12] hw/intc/arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1}, Peter Maydell, 2019/05/23
- [Qemu-devel] [PULL 12/12] hw/arm/exynos4210: QOM'ify the Exynos4210 SoC, Peter Maydell, 2019/05/23
- [Qemu-devel] [PULL 08/12] hw/intc/arm_gicv3: Fix writes to ICC_CTLR_EL3, Peter Maydell, 2019/05/23
- [Qemu-devel] [PULL 10/12] hw/arm/exynos4: Use the IEC binary prefix definitions, Peter Maydell, 2019/05/23
- [Qemu-devel] [PULL 09/12] hw/arm/exynos4: Remove unuseful debug code, Peter Maydell, 2019/05/23
- [Qemu-devel] [PULL 06/12] arm: Rename hw/arm/arm.h to hw/arm/boot.h, Peter Maydell, 2019/05/23