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[Qemu-devel] [PULL 13/48] target/arm: Convert VMINNM, VMAXNM to decodetr
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 13/48] target/arm: Convert VMINNM, VMAXNM to decodetree |
Date: |
Thu, 13 Jun 2019 13:13:58 +0100 |
Convert the VMINNM and VMAXNM instructions to decodetree.
As with VSEL, we leave the trans_VMINMAXNM() function
in translate.c for the moment.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
---
target/arm/translate.c | 41 ++++++++++++++++++++++++------------
target/arm/vfp-uncond.decode | 5 +++++
2 files changed, 33 insertions(+), 13 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 997cafdbe5c..6cbdf4307a4 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -3202,11 +3202,31 @@ static bool trans_VSEL(DisasContext *s, arg_VSEL *a)
return true;
}
-static int handle_vminmaxnm(uint32_t insn, uint32_t rd, uint32_t rn,
- uint32_t rm, uint32_t dp)
+static bool trans_VMINMAXNM(DisasContext *s, arg_VMINMAXNM *a)
{
- uint32_t vmin = extract32(insn, 6, 1);
- TCGv_ptr fpst = get_fpstatus_ptr(0);
+ uint32_t rd, rn, rm;
+ bool dp = a->dp;
+ bool vmin = a->op;
+ TCGv_ptr fpst;
+
+ if (!dc_isar_feature(aa32_vminmaxnm, s)) {
+ return false;
+ }
+
+ /* UNDEF accesses to D16-D31 if they don't exist */
+ if (dp && !dc_isar_feature(aa32_fp_d32, s) &&
+ ((a->vm | a->vn | a->vd) & 0x10)) {
+ return false;
+ }
+ rd = a->vd;
+ rn = a->vn;
+ rm = a->vm;
+
+ if (!vfp_access_check(s)) {
+ return true;
+ }
+
+ fpst = get_fpstatus_ptr(0);
if (dp) {
TCGv_i64 frn, frm, dest;
@@ -3247,7 +3267,7 @@ static int handle_vminmaxnm(uint32_t insn, uint32_t rd,
uint32_t rn,
}
tcg_temp_free_ptr(fpst);
- return 0;
+ return true;
}
static int handle_vrint(uint32_t insn, uint32_t rd, uint32_t rm, uint32_t dp,
@@ -3359,23 +3379,18 @@ static const uint8_t fp_decode_rm[] = {
static int disas_vfp_misc_insn(DisasContext *s, uint32_t insn)
{
- uint32_t rd, rn, rm, dp = extract32(insn, 8, 1);
+ uint32_t rd, rm, dp = extract32(insn, 8, 1);
if (dp) {
VFP_DREG_D(rd, insn);
- VFP_DREG_N(rn, insn);
VFP_DREG_M(rm, insn);
} else {
rd = VFP_SREG_D(insn);
- rn = VFP_SREG_N(insn);
rm = VFP_SREG_M(insn);
}
- if ((insn & 0x0fb00e10) == 0x0e800a00 &&
- dc_isar_feature(aa32_vminmaxnm, s)) {
- return handle_vminmaxnm(insn, rd, rn, rm, dp);
- } else if ((insn & 0x0fbc0ed0) == 0x0eb80a40 &&
- dc_isar_feature(aa32_vrint, s)) {
+ if ((insn & 0x0fbc0ed0) == 0x0eb80a40 &&
+ dc_isar_feature(aa32_vrint, s)) {
/* VRINTA, VRINTN, VRINTP, VRINTM */
int rounding = fp_decode_rm[extract32(insn, 16, 2)];
return handle_vrint(insn, rd, rm, dp, rounding);
diff --git a/target/arm/vfp-uncond.decode b/target/arm/vfp-uncond.decode
index b7f7c27fe86..8ab201fa058 100644
--- a/target/arm/vfp-uncond.decode
+++ b/target/arm/vfp-uncond.decode
@@ -45,3 +45,8 @@ VSEL 1111 1110 0. cc:2 .... .... 1010 .0.0 .... \
vm=%vm_sp vn=%vn_sp vd=%vd_sp dp=0
VSEL 1111 1110 0. cc:2 .... .... 1011 .0.0 .... \
vm=%vm_dp vn=%vn_dp vd=%vd_dp dp=1
+
+VMINMAXNM 1111 1110 1.00 .... .... 1010 . op:1 .0 .... \
+ vm=%vm_sp vn=%vn_sp vd=%vd_sp dp=0
+VMINMAXNM 1111 1110 1.00 .... .... 1011 . op:1 .0 .... \
+ vm=%vm_dp vn=%vn_dp vd=%vd_dp dp=1
--
2.20.1
- [Qemu-devel] [PULL 24/48] target/arm: Convert VFP VMLA to decodetree, (continued)
- [Qemu-devel] [PULL 24/48] target/arm: Convert VFP VMLA to decodetree, Peter Maydell, 2019/06/13
- [Qemu-devel] [PULL 16/48] target/arm: Move the VFP trans_* functions to translate-vfp.inc.c, Peter Maydell, 2019/06/13
- [Qemu-devel] [PULL 26/48] target/arm: Convert VFP VNMLS to decodetree, Peter Maydell, 2019/06/13
- [Qemu-devel] [PULL 33/48] target/arm: Convert VFP fused multiply-add insns to decodetree, Peter Maydell, 2019/06/13
- [Qemu-devel] [PULL 36/48] target/arm: Convert VNEG to decodetree, Peter Maydell, 2019/06/13
- [Qemu-devel] [PULL 22/48] target/arm: Convert the VFP load/store multiple insns to decodetree, Peter Maydell, 2019/06/13
- [Qemu-devel] [PULL 46/48] target/arm: Convert VCVT fp/fixed-point conversion insns to decodetree, Peter Maydell, 2019/06/13
- [Qemu-devel] [PULL 37/48] target/arm: Convert VSQRT to decodetree, Peter Maydell, 2019/06/13
- [Qemu-devel] [PULL 48/48] target/arm: Fix short-vector increment behaviour, Peter Maydell, 2019/06/13
- [Qemu-devel] [PULL 17/48] target/arm: Add helpers for VFP register loads and stores, Peter Maydell, 2019/06/13
- [Qemu-devel] [PULL 13/48] target/arm: Convert VMINNM, VMAXNM to decodetree,
Peter Maydell <=
- [Qemu-devel] [PULL 34/48] target/arm: Convert VMOV (imm) to decodetree, Peter Maydell, 2019/06/13
- [Qemu-devel] [PULL 38/48] target/arm: Convert VMOV (register) to decodetree, Peter Maydell, 2019/06/13
- [Qemu-devel] [PULL 40/48] target/arm: Convert the VCVT-from-f16 insns to decodetree, Peter Maydell, 2019/06/13
- [Qemu-devel] [PULL 39/48] target/arm: Convert VFP comparison insns to decodetree, Peter Maydell, 2019/06/13
- [Qemu-devel] [PULL 41/48] target/arm: Convert the VCVT-to-f16 insns to decodetree, Peter Maydell, 2019/06/13
- Re: [Qemu-devel] [PULL 00/48] target-arm queue, no-reply, 2019/06/13
- Re: [Qemu-devel] [PULL 00/48] target-arm queue, no-reply, 2019/06/13