[Qemu-devel] [Bug 1832535] Re: [riscv/regression] Missing tlb flush introduced in refactoring

[Alistair Francis]

Hello,

Thanks for reporting a bug.

Can you please include details to reproduce the problems that you are
seeing? This includes images and command line arguments.

Do you also mind including the diff of what fixes the problem for you?

Alistair

** Changed in: qemu
       Status: New => Incomplete

** Changed in: qemu
     Assignee: (unassigned) => Alistair Francis (alistair2323)

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https://bugs.launchpad.net/bugs/1832535

Title:
  [riscv/regression] Missing tlb flush introduced in refactoring

Status in QEMU:
  Incomplete

Bug description:
  Hello,

  In qemu-system-riscv64, following a QEMU update, I get all sort of
  weird and not easily reproducible crashes in my risc-v guest.

  I have bissected this issue to commit 
c7b951718815694284501ed01fec7acb8654db7b.
  Some TLB flushes were removed in the following places:
  target/riscv/cpu_helper.c: `csr_write_helper(env, s, CSR_MSTATUS);` -> 
`env->mstatus = s;` (twice)
  target/riscv/op_helper.c: `csr_write_helper(env, s, CSR_MSTATUS);` -> 
`env->mstatus = s;` (twice)

  Adding TLB flushes in all 4 places fixes the issues for me.

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