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[Qemu-devel] [PULL 18/46] aspeed/timer: Ensure positive muldiv delta
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 18/46] aspeed/timer: Ensure positive muldiv delta |
Date: |
Mon, 1 Jul 2019 17:39:15 +0100 |
From: Christian Svensson <address@hidden>
If the host decrements the counter register that results in a negative
delta. This is then passed to muldiv64 which only handles unsigned
numbers resulting in bogus results.
This fix ensures the delta being operated on is positive.
Test case: kexec a kernel using aspeed_timer and it will freeze on the
second bootup when the kernel initializes the timer. With this patch
that no longer happens and the timer appears to run OK.
Signed-off-by: Christian Svensson <address@hidden>
Signed-off-by: Cédric Le Goater <address@hidden>
Reviewed-by: Joel Stanley <address@hidden>
Reviewed-by: Andrew Jeffery <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/timer/aspeed_timer.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/timer/aspeed_timer.c b/hw/timer/aspeed_timer.c
index 745eb8608b5..29cc5e80708 100644
--- a/hw/timer/aspeed_timer.c
+++ b/hw/timer/aspeed_timer.c
@@ -275,7 +275,11 @@ static void aspeed_timer_set_value(AspeedTimerCtrlState
*s, int timer, int reg,
int64_t delta = (int64_t) value - (int64_t) calculate_ticks(t,
now);
uint32_t rate = calculate_rate(t);
- t->start += muldiv64(delta, NANOSECONDS_PER_SECOND, rate);
+ if (delta >= 0) {
+ t->start += muldiv64(delta, NANOSECONDS_PER_SECOND, rate);
+ } else {
+ t->start -= muldiv64(-delta, NANOSECONDS_PER_SECOND, rate);
+ }
aspeed_timer_mod(t);
}
break;
--
2.20.1
- [Qemu-devel] [PULL 29/46] target/arm: Makefile cleanup (ARM), (continued)
- [Qemu-devel] [PULL 29/46] target/arm: Makefile cleanup (ARM), Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 05/46] i.mx7d: Add no-op/unimplemented PCIE PHY IP block, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 13/46] aspeed: introduce a configurable number of CPU per machine, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 07/46] pci: designware: Update MSI mapping when MSI address changes, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 42/46] target/arm/vfp_helper: Extract vfp_set_fpscr_from_host(), Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 40/46] target/arm/vfp_helper: Move code around, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 35/46] target/arm: Fix coding style issues, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 23/46] hw/misc/aspeed_xdma: New device, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 10/46] aspeed: add a per SoC mapping for the memory space, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 25/46] aspeed: Link SCU to the watchdog, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 18/46] aspeed/timer: Ensure positive muldiv delta,
Peter Maydell <=
- [Qemu-devel] [PULL 33/46] target/arm/helper: Remove unused include, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 43/46] target/arm/vfp_helper: Restrict the SoftFloat use to TCG, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 41/46] target/arm/vfp_helper: Extract vfp_set_fpscr_to_host(), Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 12/46] hw/arm/aspeed: Add RTC to SoC, Peter Maydell, 2019/07/01
- [Qemu-devel] [PULL 31/46] target/arm: Makefile cleanup (softmmu), Peter Maydell, 2019/07/01
- Re: [Qemu-devel] [PULL 00/46] target-arm queue, Peter Maydell, 2019/07/02