[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v8 25/37] target/mips: Clean up handling of CP0 regi
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PATCH v8 25/37] target/mips: Clean up handling of CP0 register 11 |
Date: |
Mon, 19 Aug 2019 14:08:04 +0200 |
From: Aleksandar Markovic <address@hidden>
Clean up handling of CP0 register 11.
Signed-off-by: Aleksandar Markovic <address@hidden>
---
target/mips/translate.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index ac86655..07251a4 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -7213,7 +7213,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_11:
switch (sel) {
- case 0:
+ case CP0_REG11__COMPARE:
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Compare));
register_name = "Compare";
break;
@@ -7933,7 +7933,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_11:
switch (sel) {
- case 0:
+ case CP0_REG11__COMPARE:
gen_helper_mtc0_compare(cpu_env, arg);
register_name = "Compare";
break;
@@ -8700,7 +8700,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_11:
switch (sel) {
- case 0:
+ case CP0_REG11__COMPARE:
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Compare));
register_name = "Compare";
break;
@@ -9406,7 +9406,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_11:
switch (sel) {
- case 0:
+ case CP0_REG11__COMPARE:
gen_helper_mtc0_compare(cpu_env, arg);
register_name = "Compare";
break;
--
2.7.4
- [Qemu-devel] [PATCH v8 01/37] target/mips: Add support for DSPRAM, (continued)
- [Qemu-devel] [PATCH v8 01/37] target/mips: Add support for DSPRAM, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 10/37] target/mips: Style improvements in helper.c, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 04/37] target/mips: Add support for emulation of GINVT instruction, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 12/37] target/mips: Style improvements in cps.c, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 16/37] target/mips: Style improvements in mips_mipssim.c, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 13/37] target/mips: Style improvements in mips_fulong2e.c, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 05/37] target/mips: Add support for emulation of CRC32 group of instructions, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 14/37] target/mips: Style improvements in mips_int.c, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 23/37] target/mips: Clean up handling of CP0 register 8, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 06/37] target/mips: Style improvements in cp0_timer.c, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 25/37] target/mips: Clean up handling of CP0 register 11,
Aleksandar Markovic <=
- [Qemu-devel] [PATCH v8 22/37] target/mips: Clean up handling of CP0 register 7, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 18/37] target/mips: Clean up handling of CP0 register 1, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 21/37] target/mips: Clean up handling of CP0 register 6, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 28/37] target/mips: Clean up handling of CP0 register 16, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 19/37] target/mips: Clean up handling of CP0 register 2, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 29/37] target/mips: Clean up handling of CP0 register 17, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 27/37] target/mips: Clean up handling of CP0 register 15, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 17/37] target/mips: Clean up handling of CP0 register 0, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 30/37] target/mips: Clean up handling of CP0 register 20, Aleksandar Markovic, 2019/08/19
- [Qemu-devel] [PATCH v8 20/37] target/mips: Clean up handling of CP0 register 5, Aleksandar Markovic, 2019/08/19