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[PATCH v2 15/20] target/mips: msa: Split helpers for CLE_<S|U>.<B|H|W|D>
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From: |
Aleksandar Markovic |
|
Subject: |
[PATCH v2 15/20] target/mips: msa: Split helpers for CLE_<S|U>.<B|H|W|D> |
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Date: |
Wed, 25 Sep 2019 14:46:07 +0200 |
From: Aleksandar Markovic <address@hidden>
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic <address@hidden>
---
target/mips/helper.h | 12 +++-
target/mips/msa_helper.c | 150 ++++++++++++++++++++++++++++++++++++++++++-----
target/mips/translate.c | 38 ++++++++++--
3 files changed, 178 insertions(+), 22 deletions(-)
diff --git a/target/mips/helper.h b/target/mips/helper.h
index 95eb065..32ff24b 100644
--- a/target/mips/helper.h
+++ b/target/mips/helper.h
@@ -847,6 +847,16 @@ DEF_HELPER_4(msa_ceq_h, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ceq_w, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ceq_d, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_cle_s_b, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_cle_s_h, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_cle_s_w, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_cle_s_d, void, env, i32, i32, i32)
+
+DEF_HELPER_4(msa_cle_u_b, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_cle_u_h, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_cle_u_w, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_cle_u_d, void, env, i32, i32, i32)
+
DEF_HELPER_4(msa_andi_b, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ori_b, void, env, i32, i32, i32)
@@ -898,8 +908,6 @@ DEF_HELPER_5(msa_max_a_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_min_a_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_clt_s_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_clt_u_df, void, env, i32, i32, i32, i32)
-DEF_HELPER_5(msa_cle_s_df, void, env, i32, i32, i32, i32)
-DEF_HELPER_5(msa_cle_u_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_add_a_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_adds_a_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_adds_s_df, void, env, i32, i32, i32, i32)
diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
index 65d9c9b..c4bff76 100644
--- a/target/mips/msa_helper.c
+++ b/target/mips/msa_helper.c
@@ -1204,6 +1204,142 @@ void helper_msa_ceq_d(CPUMIPSState *env, uint32_t wd,
uint32_t ws, uint32_t wt)
pwd->d[1] = msa_ceq_df(DF_DOUBLE, pws->d[0], pwt->d[1]);
}
+static inline int64_t msa_cle_s_df(uint32_t df, int64_t arg1, int64_t arg2)
+{
+ return arg1 <= arg2 ? -1 : 0;
+}
+
+void helper_msa_cle_s_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t
wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->b[0] = msa_cle_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
+ pwd->b[1] = msa_cle_s_df(DF_BYTE, pws->b[0], pwt->b[1]);
+ pwd->b[2] = msa_cle_s_df(DF_BYTE, pws->b[0], pwt->b[2]);
+ pwd->b[3] = msa_cle_s_df(DF_BYTE, pws->b[0], pwt->b[3]);
+ pwd->b[4] = msa_cle_s_df(DF_BYTE, pws->b[0], pwt->b[4]);
+ pwd->b[5] = msa_cle_s_df(DF_BYTE, pws->b[0], pwt->b[5]);
+ pwd->b[6] = msa_cle_s_df(DF_BYTE, pws->b[0], pwt->b[6]);
+ pwd->b[7] = msa_cle_s_df(DF_BYTE, pws->b[0], pwt->b[7]);
+ pwd->b[8] = msa_cle_s_df(DF_BYTE, pws->b[0], pwt->b[8]);
+ pwd->b[9] = msa_cle_s_df(DF_BYTE, pws->b[0], pwt->b[9]);
+ pwd->b[10] = msa_cle_s_df(DF_BYTE, pws->b[0], pwt->b[10]);
+ pwd->b[11] = msa_cle_s_df(DF_BYTE, pws->b[0], pwt->b[11]);
+ pwd->b[12] = msa_cle_s_df(DF_BYTE, pws->b[0], pwt->b[12]);
+ pwd->b[13] = msa_cle_s_df(DF_BYTE, pws->b[0], pwt->b[13]);
+ pwd->b[14] = msa_cle_s_df(DF_BYTE, pws->b[0], pwt->b[14]);
+ pwd->b[15] = msa_cle_s_df(DF_BYTE, pws->b[0], pwt->b[15]);
+}
+
+void helper_msa_cle_s_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t
wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->h[0] = msa_cle_s_df(DF_HALF, pws->h[0], pwt->h[0]);
+ pwd->h[1] = msa_cle_s_df(DF_HALF, pws->h[0], pwt->h[1]);
+ pwd->h[2] = msa_cle_s_df(DF_HALF, pws->h[0], pwt->h[2]);
+ pwd->h[3] = msa_cle_s_df(DF_HALF, pws->h[0], pwt->h[3]);
+ pwd->h[4] = msa_cle_s_df(DF_HALF, pws->h[0], pwt->h[4]);
+ pwd->h[5] = msa_cle_s_df(DF_HALF, pws->h[0], pwt->h[5]);
+ pwd->h[6] = msa_cle_s_df(DF_HALF, pws->h[0], pwt->h[6]);
+ pwd->h[7] = msa_cle_s_df(DF_HALF, pws->h[0], pwt->h[7]);
+}
+
+void helper_msa_cle_s_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t
wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->w[0] = msa_cle_s_df(DF_WORD, pws->w[0], pwt->w[0]);
+ pwd->w[1] = msa_cle_s_df(DF_WORD, pws->w[0], pwt->w[1]);
+ pwd->w[2] = msa_cle_s_df(DF_WORD, pws->w[0], pwt->w[2]);
+ pwd->w[3] = msa_cle_s_df(DF_WORD, pws->w[0], pwt->w[3]);
+}
+
+void helper_msa_cle_s_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t
wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->d[0] = msa_cle_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
+ pwd->d[1] = msa_cle_s_df(DF_DOUBLE, pws->d[0], pwt->d[1]);
+}
+
+static inline int64_t msa_cle_u_df(uint32_t df, int64_t arg1, int64_t arg2)
+{
+ uint64_t u_arg1 = UNSIGNED(arg1, df);
+ uint64_t u_arg2 = UNSIGNED(arg2, df);
+ return u_arg1 <= u_arg2 ? -1 : 0;
+}
+
+void helper_msa_cle_u_b(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t
wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->b[0] = msa_cle_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
+ pwd->b[1] = msa_cle_u_df(DF_BYTE, pws->b[0], pwt->b[1]);
+ pwd->b[2] = msa_cle_u_df(DF_BYTE, pws->b[0], pwt->b[2]);
+ pwd->b[3] = msa_cle_u_df(DF_BYTE, pws->b[0], pwt->b[3]);
+ pwd->b[4] = msa_cle_u_df(DF_BYTE, pws->b[0], pwt->b[4]);
+ pwd->b[5] = msa_cle_u_df(DF_BYTE, pws->b[0], pwt->b[5]);
+ pwd->b[6] = msa_cle_u_df(DF_BYTE, pws->b[0], pwt->b[6]);
+ pwd->b[7] = msa_cle_u_df(DF_BYTE, pws->b[0], pwt->b[7]);
+ pwd->b[8] = msa_cle_u_df(DF_BYTE, pws->b[0], pwt->b[8]);
+ pwd->b[9] = msa_cle_u_df(DF_BYTE, pws->b[0], pwt->b[9]);
+ pwd->b[10] = msa_cle_u_df(DF_BYTE, pws->b[0], pwt->b[10]);
+ pwd->b[11] = msa_cle_u_df(DF_BYTE, pws->b[0], pwt->b[11]);
+ pwd->b[12] = msa_cle_u_df(DF_BYTE, pws->b[0], pwt->b[12]);
+ pwd->b[13] = msa_cle_u_df(DF_BYTE, pws->b[0], pwt->b[13]);
+ pwd->b[14] = msa_cle_u_df(DF_BYTE, pws->b[0], pwt->b[14]);
+ pwd->b[15] = msa_cle_u_df(DF_BYTE, pws->b[0], pwt->b[15]);
+}
+
+void helper_msa_cle_u_h(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t
wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->h[0] = msa_cle_u_df(DF_HALF, pws->h[0], pwt->h[0]);
+ pwd->h[1] = msa_cle_u_df(DF_HALF, pws->h[0], pwt->h[1]);
+ pwd->h[2] = msa_cle_u_df(DF_HALF, pws->h[0], pwt->h[2]);
+ pwd->h[3] = msa_cle_u_df(DF_HALF, pws->h[0], pwt->h[3]);
+ pwd->h[4] = msa_cle_u_df(DF_HALF, pws->h[0], pwt->h[4]);
+ pwd->h[5] = msa_cle_u_df(DF_HALF, pws->h[0], pwt->h[5]);
+ pwd->h[6] = msa_cle_u_df(DF_HALF, pws->h[0], pwt->h[6]);
+ pwd->h[7] = msa_cle_u_df(DF_HALF, pws->h[0], pwt->h[7]);
+}
+
+void helper_msa_cle_u_w(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t
wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->w[0] = msa_cle_u_df(DF_WORD, pws->w[0], pwt->w[0]);
+ pwd->w[1] = msa_cle_u_df(DF_WORD, pws->w[0], pwt->w[1]);
+ pwd->w[2] = msa_cle_u_df(DF_WORD, pws->w[0], pwt->w[2]);
+ pwd->w[3] = msa_cle_u_df(DF_WORD, pws->w[0], pwt->w[3]);
+}
+
+void helper_msa_cle_u_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t
wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->d[0] = msa_cle_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
+ pwd->d[1] = msa_cle_u_df(DF_DOUBLE, pws->d[0], pwt->d[1]);
+}
+
/*
* Int Divide
@@ -1611,18 +1747,6 @@ static inline int64_t msa_subv_df(uint32_t df, int64_t
arg1, int64_t arg2)
return arg1 - arg2;
}
-static inline int64_t msa_cle_s_df(uint32_t df, int64_t arg1, int64_t arg2)
-{
- return arg1 <= arg2 ? -1 : 0;
-}
-
-static inline int64_t msa_cle_u_df(uint32_t df, int64_t arg1, int64_t arg2)
-{
- uint64_t u_arg1 = UNSIGNED(arg1, df);
- uint64_t u_arg2 = UNSIGNED(arg2, df);
- return u_arg1 <= u_arg2 ? -1 : 0;
-}
-
static inline int64_t msa_clt_s_df(uint32_t df, int64_t arg1, int64_t arg2)
{
return arg1 < arg2 ? -1 : 0;
@@ -2234,8 +2358,6 @@ MSA_BINOP_DF(max_a)
MSA_BINOP_DF(min_a)
MSA_BINOP_DF(clt_s)
MSA_BINOP_DF(clt_u)
-MSA_BINOP_DF(cle_s)
-MSA_BINOP_DF(cle_u)
MSA_BINOP_DF(add_a)
MSA_BINOP_DF(adds_a)
MSA_BINOP_DF(adds_s)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index ad1572e..614b9e7 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -28546,6 +28546,38 @@ static void gen_msa_3r(CPUMIPSState *env, DisasContext
*ctx)
break;
}
break;
+ case OPC_CLE_S_df:
+ switch (df) {
+ case DF_BYTE:
+ gen_helper_msa_cle_s_b(cpu_env, twd, tws, twt);
+ break;
+ case DF_HALF:
+ gen_helper_msa_cle_s_h(cpu_env, twd, tws, twt);
+ break;
+ case DF_WORD:
+ gen_helper_msa_cle_s_w(cpu_env, twd, tws, twt);
+ break;
+ case DF_DOUBLE:
+ gen_helper_msa_cle_s_d(cpu_env, twd, tws, twt);
+ break;
+ }
+ break;
+ case OPC_CLE_U_df:
+ switch (df) {
+ case DF_BYTE:
+ gen_helper_msa_cle_u_b(cpu_env, twd, tws, twt);
+ break;
+ case DF_HALF:
+ gen_helper_msa_cle_u_h(cpu_env, twd, tws, twt);
+ break;
+ case DF_WORD:
+ gen_helper_msa_cle_u_w(cpu_env, twd, tws, twt);
+ break;
+ case DF_DOUBLE:
+ gen_helper_msa_cle_u_d(cpu_env, twd, tws, twt);
+ break;
+ }
+ break;
case OPC_SLL_df:
gen_helper_msa_sll_df(cpu_env, tdf, twd, tws, twt);
break;
@@ -28630,9 +28662,6 @@ static void gen_msa_3r(CPUMIPSState *env, DisasContext
*ctx)
case OPC_MIN_S_df:
gen_helper_msa_min_s_df(cpu_env, tdf, twd, tws, twt);
break;
- case OPC_CLE_S_df:
- gen_helper_msa_cle_s_df(cpu_env, tdf, twd, tws, twt);
- break;
case OPC_ASUB_S_df:
gen_helper_msa_asub_s_df(cpu_env, tdf, twd, tws, twt);
break;
@@ -28645,9 +28674,6 @@ static void gen_msa_3r(CPUMIPSState *env, DisasContext
*ctx)
case OPC_MIN_U_df:
gen_helper_msa_min_u_df(cpu_env, tdf, twd, tws, twt);
break;
- case OPC_CLE_U_df:
- gen_helper_msa_cle_u_df(cpu_env, tdf, twd, tws, twt);
- break;
case OPC_ASUB_U_df:
gen_helper_msa_asub_u_df(cpu_env, tdf, twd, tws, twt);
break;
--
2.7.4
- [PATCH v2 09/20] target/mips: msa: Split helpers for BINS<L|R>.<B|H|W|D>, (continued)
- [PATCH v2 09/20] target/mips: msa: Split helpers for BINS<L|R>.<B|H|W|D>, Aleksandar Markovic, 2019/09/25
- [PATCH v2 01/20] target/mips: Clean up helper.c, Aleksandar Markovic, 2019/09/25
- [PATCH v2 08/20] target/mips: msa: Split helpers for PCNT.<B|H|W|D>, Aleksandar Markovic, 2019/09/25
- [PATCH v2 11/20] target/mips: msa: Split helpers for B<CLR|NEG|SEL>.<B|H|W|D>, Aleksandar Markovic, 2019/09/25
- [PATCH v2 20/20] target/mips: msa: Move helpers for <AND|NOR|OR|XOR>.V, Aleksandar Markovic, 2019/09/25
- [PATCH v2 19/20] target/mips: msa: Simplify and move helper for MOVE.V, Aleksandar Markovic, 2019/09/25
- [PATCH v2 17/20] target/mips: msa: Split helpers for DIV_<S|U>.<B|H|W|D>, Aleksandar Markovic, 2019/09/25
- [PATCH v2 14/20] target/mips: msa: Split helpers for CEQ.<B|H|W|D>, Aleksandar Markovic, 2019/09/25
- [PATCH v2 13/20] target/mips: msa: Split helpers for AVER_<S|U>.<B|H|W|D>, Aleksandar Markovic, 2019/09/25
- [PATCH v2 15/20] target/mips: msa: Split helpers for CLE_<S|U>.<B|H|W|D>,
Aleksandar Markovic <=
- [PATCH v2 12/20] target/mips: msa: Split helpers for AVE_<S|U>.<B|H|W|D>, Aleksandar Markovic, 2019/09/25
- [PATCH v2 16/20] target/mips: msa: Split helpers for CLT_<S|U>.<B|H|W|D>, Aleksandar Markovic, 2019/09/25
- [PATCH v2 18/20] target/mips: msa: Split helpers for MOD_<S|U>.<B|H|W|D>, Aleksandar Markovic, 2019/09/25
- [PATCH v2 05/20] target/mips: Clean up op_helper.c, Aleksandar Markovic, 2019/09/25
- Re: [EXTERNAL][PATCH v2 00/20] target/mips: Misc cleanups for September/October 2019, Aleksandar Rikalo, 2019/09/25
- Re: [EXTERNAL][PATCH v2 00/20] target/mips: Misc cleanups for September/October 2019, Aleksandar Rikalo, 2019/09/25