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[PULL 12/16] cputlb: Handle TLB_NOTDIRTY in probe_access
From: |
Richard Henderson |
Subject: |
[PULL 12/16] cputlb: Handle TLB_NOTDIRTY in probe_access |
Date: |
Wed, 25 Sep 2019 11:45:44 -0700 |
We can use notdirty_write for the write and return a valid host
pointer for this case.
Reviewed-by: David Hildenbrand <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
accel/tcg/cputlb.c | 26 +++++++++++++++++---------
1 file changed, 17 insertions(+), 9 deletions(-)
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 3e91838519..b56e9ddf8c 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -1168,16 +1168,24 @@ void *probe_access(CPUArchState *env, target_ulong
addr, int size,
return NULL;
}
- /* Handle watchpoints. */
- if (tlb_addr & TLB_WATCHPOINT) {
- cpu_check_watchpoint(env_cpu(env), addr, size,
- env_tlb(env)->d[mmu_idx].iotlb[index].attrs,
- wp_access, retaddr);
- }
+ if (unlikely(tlb_addr & TLB_FLAGS_MASK)) {
+ CPUIOTLBEntry *iotlbentry = &env_tlb(env)->d[mmu_idx].iotlb[index];
- /* Reject I/O access, or other required slow-path. */
- if (tlb_addr & (TLB_NOTDIRTY | TLB_MMIO | TLB_BSWAP | TLB_DISCARD_WRITE)) {
- return NULL;
+ /* Reject I/O access, or other required slow-path. */
+ if (tlb_addr & (TLB_MMIO | TLB_BSWAP | TLB_DISCARD_WRITE)) {
+ return NULL;
+ }
+
+ /* Handle watchpoints. */
+ if (tlb_addr & TLB_WATCHPOINT) {
+ cpu_check_watchpoint(env_cpu(env), addr, size,
+ iotlbentry->attrs, wp_access, retaddr);
+ }
+
+ /* Handle clean RAM pages. */
+ if (tlb_addr & TLB_NOTDIRTY) {
+ notdirty_write(env_cpu(env), addr, size, iotlbentry, retaddr);
+ }
}
return (void *)((uintptr_t)addr + entry->addend);
--
2.17.1
- [PULL 01/16] exec: Use TARGET_PAGE_BITS_MIN for TLB flags, (continued)
- [PULL 01/16] exec: Use TARGET_PAGE_BITS_MIN for TLB flags, Richard Henderson, 2019/09/25
- [PULL 02/16] cputlb: Disable __always_inline__ without optimization, Richard Henderson, 2019/09/25
- [PULL 03/16] qemu/compiler.h: Add qemu_build_not_reached, Richard Henderson, 2019/09/25
- [PULL 04/16] cputlb: Use qemu_build_not_reached in load/store_helpers, Richard Henderson, 2019/09/25
- [PULL 05/16] cputlb: Split out load/store_memop, Richard Henderson, 2019/09/25
- [PULL 06/16] cputlb: Introduce TLB_BSWAP, Richard Henderson, 2019/09/25
- [PULL 07/16] exec: Adjust notdirty tracing, Richard Henderson, 2019/09/25
- [PULL 09/16] cputlb: Move NOTDIRTY handling from I/O path to TLB path, Richard Henderson, 2019/09/25
- [PULL 08/16] cputlb: Move ROM handling from I/O path to TLB path, Richard Henderson, 2019/09/25
- [PULL 11/16] cputlb: Merge and move memory_notdirty_write_{prepare, complete}, Richard Henderson, 2019/09/25
- [PULL 12/16] cputlb: Handle TLB_NOTDIRTY in probe_access,
Richard Henderson <=
- [PULL 10/16] cputlb: Partially inline memory_region_section_get_iotlb, Richard Henderson, 2019/09/25
- [PULL 13/16] cputlb: Remove cpu->mem_io_vaddr, Richard Henderson, 2019/09/25
- [PULL 14/16] cputlb: Remove tb_invalidate_phys_page_range is_cpu_write_access, Richard Henderson, 2019/09/25
- [PULL 15/16] cputlb: Pass retaddr to tb_invalidate_phys_page_fast, Richard Henderson, 2019/09/25
- [PULL 16/16] cputlb: Pass retaddr to tb_check_watchpoint, Richard Henderson, 2019/09/25
- Re: [PULL 00/16] tcg patch queue, Peter Maydell, 2019/09/27