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[PATCH v2 14/20] hw/pci-host/piix: Move RCR_IOPORT register definition
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v2 14/20] hw/pci-host/piix: Move RCR_IOPORT register definition |
Date: |
Fri, 18 Oct 2019 15:47:48 +0200 |
From: Philippe Mathieu-Daudé <address@hidden>
The RCR_IOPORT register belongs to the PIIX chipset.
Move the definition to "piix.h", and prepend the PIIX prefix.
Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
---
v2: prepend PIIX prefix (Aleksandar)
---
hw/i386/acpi-build.c | 2 +-
hw/pci-host/piix.c | 7 ++++---
include/hw/i386/pc.h | 6 ------
include/hw/southbridge/piix.h | 6 ++++++
4 files changed, 11 insertions(+), 10 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 56c427f772..478ca29874 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -209,7 +209,7 @@ static void acpi_get_pm_info(MachineState *machine,
AcpiPmInfo *pm)
/* The above need not be conditional on machine type because the reset port
* happens to be the same on PIIX (pc) and ICH9 (q35). */
- QEMU_BUILD_BUG_ON(ICH9_RST_CNT_IOPORT != RCR_IOPORT);
+ QEMU_BUILD_BUG_ON(ICH9_RST_CNT_IOPORT != PIIX_RCR_IOPORT);
/* Fill in optional s3/s4 related properties */
o = object_property_get_qobject(obj, ACPI_PM_PROP_S3_DISABLED, NULL);
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index 3292703de7..6548d9a4b5 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -27,6 +27,7 @@
#include "hw/irq.h"
#include "hw/pci/pci.h"
#include "hw/pci/pci_host.h"
+#include "hw/southbridge/piix.h"
#include "hw/qdev-properties.h"
#include "hw/isa/isa.h"
#include "hw/sysbus.h"
@@ -87,7 +88,7 @@ typedef struct PIIX3State {
/* Reset Control Register contents */
uint8_t rcr;
- /* IO memory region for Reset Control Register (RCR_IOPORT) */
+ /* IO memory region for Reset Control Register (PIIX_RCR_IOPORT) */
MemoryRegion rcr_mem;
} PIIX3State;
@@ -695,8 +696,8 @@ static void piix3_realize(PCIDevice *dev, Error **errp)
memory_region_init_io(&d->rcr_mem, OBJECT(dev), &rcr_ops, d,
"piix3-reset-control", 1);
- memory_region_add_subregion_overlap(pci_address_space_io(dev), RCR_IOPORT,
- &d->rcr_mem, 1);
+ memory_region_add_subregion_overlap(pci_address_space_io(dev),
+ PIIX_RCR_IOPORT, &d->rcr_mem, 1);
qemu_register_reset(piix3_reset, d);
}
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 848078bacc..2628de8b72 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -260,12 +260,6 @@ typedef struct PCII440FXState PCII440FXState;
#define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX"
-/*
- * Reset Control Register: PCI-accessible ISA-Compatible Register at address
- * 0xcf9, provided by the PCI/ISA bridge (PIIX3 PCI function 0, 8086:7000).
- */
-#define RCR_IOPORT 0xcf9
-
PCIBus *i440fx_init(const char *host_type, const char *pci_type,
PCII440FXState **pi440fx_state, int *piix_devfn,
ISABus **isa_bus, qemu_irq *pic,
diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h
index add352456b..e49d4a6bbe 100644
--- a/include/hw/southbridge/piix.h
+++ b/include/hw/southbridge/piix.h
@@ -18,6 +18,12 @@ I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t
smb_io_base,
qemu_irq sci_irq, qemu_irq smi_irq,
int smm_enabled, DeviceState **piix4_pm);
+/*
+ * Reset Control Register: PCI-accessible ISA-Compatible Register at address
+ * 0xcf9, provided by the PCI/ISA bridge (PIIX3 PCI function 0, 8086:7000).
+ */
+#define PIIX_RCR_IOPORT 0xcf9
+
extern PCIDevice *piix4_dev;
DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus,
--
2.21.0
- Re: [PATCH v2 06/20] piix4: Add a i8257 DMA Controller as specified in datasheet, (continued)
- [PATCH v2 07/20] piix4: Add a i8254 PIT Controller as specified in datasheet, Philippe Mathieu-Daudé, 2019/10/18
- [PATCH v2 08/20] piix4: Add a MC146818 RTC Controller as specified in datasheet, Philippe Mathieu-Daudé, 2019/10/18
- [PATCH v2 09/20] hw/mips/mips_malta: Create IDE hard drive array dynamically, Philippe Mathieu-Daudé, 2019/10/18
- [PATCH v2 10/20] hw/mips/mips_malta: Extract the PIIX4 creation code as piix4_create(), Philippe Mathieu-Daudé, 2019/10/18
- [PATCH v2 11/20] hw/isa/piix4: Move piix4_create() to hw/isa/piix4.c, Philippe Mathieu-Daudé, 2019/10/18
- [PATCH v2 12/20] hw/i386: Remove obsolete LoadStateHandler::load_state_old handlers, Philippe Mathieu-Daudé, 2019/10/18
- [PATCH v2 13/20] hw/pci-host/piix: Extract piix3_create(), Philippe Mathieu-Daudé, 2019/10/18
- [PATCH v2 14/20] hw/pci-host/piix: Move RCR_IOPORT register definition,
Philippe Mathieu-Daudé <=
- [PATCH v2 15/20] hw/pci-host/piix: Define and use the PIIX IRQ Route Control Registers, Philippe Mathieu-Daudé, 2019/10/18
- [PATCH v2 16/20] hw/pci-host/piix: Move i440FX declarations to hw/pci-host/i440fx.h, Philippe Mathieu-Daudé, 2019/10/18
- [PATCH v2 17/20] hw/pci-host/piix: Fix code style issues, Philippe Mathieu-Daudé, 2019/10/18
- [PATCH v2 18/20] hw/pci-host/piix: Extract PIIX3 functions to hw/isa/piix3.c, Philippe Mathieu-Daudé, 2019/10/18
- [PATCH v2 19/20] hw/pci-host: Rename incorrectly named 'piix' as 'i440fx', Philippe Mathieu-Daudé, 2019/10/18
- [PATCH v2 20/20] hw/pci-host/i440fx: Remove the last PIIX3 traces, Philippe Mathieu-Daudé, 2019/10/18
- Re: [PATCH v2 00/20] hw/i386/pc: Split PIIX3 southbridge from i440FX northbridge, no-reply, 2019/10/19