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Re: [PATCH 1/4] target/arm: Vectorize USHL and SSHL
From: |
Richard Henderson |
Subject: |
Re: [PATCH 1/4] target/arm: Vectorize USHL and SSHL |
Date: |
Fri, 18 Oct 2019 07:47:12 -0700 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.9.0 |
On 10/17/19 9:01 AM, Alex Bennée wrote:
>> + /*
>> + * Rely on the TCG guarantee that out of range shifts produce
>> + * unspecified results, not undefined behaviour (i.e. no trap).
>> + * Discard out-of-range results after the fact.
>> + */
>> + tcg_gen_ext8s_i32(lsh, b);
>> + tcg_gen_neg_i32(rsh, lsh);
>> + tcg_gen_shl_i32(lval, a, lsh);
>> + tcg_gen_shr_i32(rval, a, rsh);
>> + tcg_gen_movcond_i32(TCG_COND_LTU, d, lsh, max, lval, zero);
>> + tcg_gen_movcond_i32(TCG_COND_LTU, d, rsh, max, rval, d);
>
> Do these get dead coded away if the shift is a const?
They would, although because of the form of the instruction, as a variable
shift from a vector element, I don't expect it to ever be const. We will have
just read the value from env memory.
r~
- [PATCH 0/4] target/arm vector improvements, Richard Henderson, 2019/10/17
- [PATCH 2/4] target/arm: Convert PMUL.8 to gvec, Richard Henderson, 2019/10/17
- [PATCH 1/4] target/arm: Vectorize USHL and SSHL, Richard Henderson, 2019/10/17
- [PATCH 3/4] target/arm: Convert PMULL.64 to gvec, Richard Henderson, 2019/10/17
- [PATCH 4/4] target/arm: Convert PMULL.8 to gvec, Richard Henderson, 2019/10/17
- Re: [PATCH 0/4] target/arm vector improvements, no-reply, 2019/10/17
- Re: [PATCH 0/4] target/arm vector improvements, Alex Bennée, 2019/10/18