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Re: [PATCH v3 06/16] hw/arm/bcm2836: Rename cpus[] as cpu[].core
From: |
Alistair Francis |
Subject: |
Re: [PATCH v3 06/16] hw/arm/bcm2836: Rename cpus[] as cpu[].core |
Date: |
Mon, 21 Oct 2019 13:46:10 -0700 |
On Sat, Oct 19, 2019 at 4:49 PM Philippe Mathieu-Daudé <address@hidden> wrote:
>
> As we are going to add more core-specific fields, add a 'cpu'
> structure and move the ARMCPU field there as 'core'.
>
> Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Alistair
> ---
> hw/arm/bcm2836.c | 26 ++++++++++++++------------
> include/hw/arm/bcm2836.h | 4 +++-
> 2 files changed, 17 insertions(+), 13 deletions(-)
>
> diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
> index 019e67b906..221ff06895 100644
> --- a/hw/arm/bcm2836.c
> +++ b/hw/arm/bcm2836.c
> @@ -51,8 +51,9 @@ static void bcm2836_init(Object *obj)
> int n;
>
> for (n = 0; n < BCM283X_NCPUS; n++) {
> - object_initialize_child(obj, "cpu[*]", &s->cpus[n],
> sizeof(s->cpus[n]),
> - info->cpu_type, &error_abort, NULL);
> + object_initialize_child(obj, "cpu[*]", &s->cpu[n].core,
> + sizeof(s->cpu[n].core), info->cpu_type,
> + &error_abort, NULL);
> }
>
> sysbus_init_child_obj(obj, "control", &s->control, sizeof(s->control),
> @@ -122,10 +123,10 @@ static void bcm2836_realize(DeviceState *dev, Error
> **errp)
>
> for (n = 0; n < BCM283X_NCPUS; n++) {
> /* TODO: this should be converted to a property of ARM_CPU */
> - s->cpus[n].mp_affinity = (info->clusterid << 8) | n;
> + s->cpu[n].core.mp_affinity = (info->clusterid << 8) | n;
>
> /* set periphbase/CBAR value for CPU-local registers */
> - object_property_set_int(OBJECT(&s->cpus[n]),
> + object_property_set_int(OBJECT(&s->cpu[n].core),
> info->peri_base,
> "reset-cbar", &err);
> if (err) {
> @@ -134,14 +135,15 @@ static void bcm2836_realize(DeviceState *dev, Error
> **errp)
> }
>
> /* start powered off if not enabled */
> - object_property_set_bool(OBJECT(&s->cpus[n]), n >= s->enabled_cpus,
> + object_property_set_bool(OBJECT(&s->cpu[n].core), n >=
> s->enabled_cpus,
> "start-powered-off", &err);
> if (err) {
> error_propagate(errp, err);
> return;
> }
>
> - object_property_set_bool(OBJECT(&s->cpus[n]), true, "realized",
> &err);
> + object_property_set_bool(OBJECT(&s->cpu[n].core), true,
> + "realized", &err);
> if (err) {
> error_propagate(errp, err);
> return;
> @@ -149,18 +151,18 @@ static void bcm2836_realize(DeviceState *dev, Error
> **errp)
>
> /* Connect irq/fiq outputs from the interrupt controller. */
> qdev_connect_gpio_out_named(DEVICE(&s->control), "irq", n,
> - qdev_get_gpio_in(DEVICE(&s->cpus[n]), ARM_CPU_IRQ));
> + qdev_get_gpio_in(DEVICE(&s->cpu[n].core), ARM_CPU_IRQ));
> qdev_connect_gpio_out_named(DEVICE(&s->control), "fiq", n,
> - qdev_get_gpio_in(DEVICE(&s->cpus[n]), ARM_CPU_FIQ));
> + qdev_get_gpio_in(DEVICE(&s->cpu[n].core), ARM_CPU_FIQ));
>
> /* Connect timers from the CPU to the interrupt controller */
> - qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_PHYS,
> + qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_PHYS,
> qdev_get_gpio_in_named(DEVICE(&s->control), "cntpnsirq", n));
> - qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_VIRT,
> + qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_VIRT,
> qdev_get_gpio_in_named(DEVICE(&s->control), "cntvirq", n));
> - qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_HYP,
> + qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_HYP,
> qdev_get_gpio_in_named(DEVICE(&s->control), "cnthpirq", n));
> - qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_SEC,
> + qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_SEC,
> qdev_get_gpio_in_named(DEVICE(&s->control), "cntpsirq", n));
> }
> }
> diff --git a/include/hw/arm/bcm2836.h b/include/hw/arm/bcm2836.h
> index 97187f72be..92a6544816 100644
> --- a/include/hw/arm/bcm2836.h
> +++ b/include/hw/arm/bcm2836.h
> @@ -35,7 +35,9 @@ typedef struct BCM283XState {
> char *cpu_type;
> uint32_t enabled_cpus;
>
> - ARMCPU cpus[BCM283X_NCPUS];
> + struct {
> + ARMCPU core;
> + } cpu[BCM283X_NCPUS];
> BCM2836ControlState control;
> BCM2835PeripheralState peripherals;
> } BCM283XState;
> --
> 2.21.0
>
>
- [PATCH v3 01/16] hw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensor, (continued)
- [PATCH v3 01/16] hw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensor, Philippe Mathieu-Daudé, 2019/10/19
- [PATCH v3 02/16] hw/arm/bcm2835_peripherals: Use the thermal sensor block, Philippe Mathieu-Daudé, 2019/10/19
- [PATCH v3 03/16] hw/timer/bcm2835: Add the BCM2835 SYS_timer, Philippe Mathieu-Daudé, 2019/10/19
- [PATCH v3 04/16] hw/arm/bcm2835_peripherals: Use the SYS_timer, Philippe Mathieu-Daudé, 2019/10/19
- [PATCH v3 05/16] hw/arm/bcm2836: Make the SoC code modular, Philippe Mathieu-Daudé, 2019/10/19
- [PATCH v3 06/16] hw/arm/bcm2836: Rename cpus[] as cpu[].core, Philippe Mathieu-Daudé, 2019/10/19
- Re: [PATCH v3 06/16] hw/arm/bcm2836: Rename cpus[] as cpu[].core,
Alistair Francis <=
- [PATCH v3 08/16] hw/arm/bcm2835_peripherals: Add const link property in realize(), Philippe Mathieu-Daudé, 2019/10/19
- [PATCH v3 07/16] hw/arm/bcm2836: Use per CPU address spaces, Philippe Mathieu-Daudé, 2019/10/19
- [PATCH v3 09/16] hw/arm/bcm2836: Create VideoCore address space in the SoC, Philippe Mathieu-Daudé, 2019/10/19
- [PATCH v3 10/16] hw/arm/raspi: Use AddressSpace when using arm_boot::write_secondary_boot, Philippe Mathieu-Daudé, 2019/10/19
- [PATCH v3 11/16] hw/arm/raspi: Use -smp cores=<N> option to restrict enabled cores, Philippe Mathieu-Daudé, 2019/10/19