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[PULL 15/41] target/arm: Split out rebuild_hflags_m32
From: |
Peter Maydell |
Subject: |
[PULL 15/41] target/arm: Split out rebuild_hflags_m32 |
Date: |
Tue, 22 Oct 2019 14:31:08 +0100 |
From: Richard Henderson <address@hidden>
Create a function to compute the values of the TBFLAG_A32 bits
that will be cached, and are used by M-profile.
Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/helper.c | 45 ++++++++++++++++++++++++++++++---------------
1 file changed, 30 insertions(+), 15 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 4c65476d936..d4303420daf 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -11083,6 +11083,29 @@ static uint32_t rebuild_hflags_common_32(CPUARMState
*env, int fp_el,
return rebuild_hflags_common(env, fp_el, mmu_idx, flags);
}
+static uint32_t rebuild_hflags_m32(CPUARMState *env, int fp_el,
+ ARMMMUIdx mmu_idx)
+{
+ uint32_t flags = 0;
+
+ if (arm_v7m_is_handler_mode(env)) {
+ flags = FIELD_DP32(flags, TBFLAG_A32, HANDLER, 1);
+ }
+
+ /*
+ * v8M always applies stack limit checks unless CCR.STKOFHFNMIGN
+ * is suppressing them because the requested execution priority
+ * is less than 0.
+ */
+ if (arm_feature(env, ARM_FEATURE_V8) &&
+ !((mmu_idx & ARM_MMU_IDX_M_NEGPRI) &&
+ (env->v7m.ccr[env->v7m.secure] & R_V7M_CCR_STKOFHFNMIGN_MASK))) {
+ flags = FIELD_DP32(flags, TBFLAG_A32, STACKCHECK, 1);
+ }
+
+ return rebuild_hflags_common_32(env, fp_el, mmu_idx, flags);
+}
+
static uint32_t rebuild_hflags_a64(CPUARMState *env, int el, int fp_el,
ARMMMUIdx mmu_idx)
{
@@ -11168,7 +11191,13 @@ void cpu_get_tb_cpu_state(CPUARMState *env,
target_ulong *pc,
}
} else {
*pc = env->regs[15];
- flags = rebuild_hflags_common_32(env, fp_el, mmu_idx, 0);
+
+ if (arm_feature(env, ARM_FEATURE_M)) {
+ flags = rebuild_hflags_m32(env, fp_el, mmu_idx);
+ } else {
+ flags = rebuild_hflags_common_32(env, fp_el, mmu_idx, 0);
+ }
+
flags = FIELD_DP32(flags, TBFLAG_A32, THUMB, env->thumb);
flags = FIELD_DP32(flags, TBFLAG_A32, VECLEN, env->vfp.vec_len);
flags = FIELD_DP32(flags, TBFLAG_A32, VECSTRIDE, env->vfp.vec_stride);
@@ -11204,20 +11233,6 @@ void cpu_get_tb_cpu_state(CPUARMState *env,
target_ulong *pc,
}
}
- if (arm_v7m_is_handler_mode(env)) {
- flags = FIELD_DP32(flags, TBFLAG_A32, HANDLER, 1);
- }
-
- /* v8M always applies stack limit checks unless CCR.STKOFHFNMIGN is
- * suppressing them because the requested execution priority is less than
0.
- */
- if (arm_feature(env, ARM_FEATURE_V8) &&
- arm_feature(env, ARM_FEATURE_M) &&
- !((mmu_idx & ARM_MMU_IDX_M_NEGPRI) &&
- (env->v7m.ccr[env->v7m.secure] & R_V7M_CCR_STKOFHFNMIGN_MASK))) {
- flags = FIELD_DP32(flags, TBFLAG_A32, STACKCHECK, 1);
- }
-
if (arm_feature(env, ARM_FEATURE_M_SECURITY) &&
FIELD_EX32(env->v7m.fpccr[M_REG_S], V7M_FPCCR, S) != env->v7m.secure) {
flags = FIELD_DP32(flags, TBFLAG_A32, FPCCR_S_WRONG, 1);
--
2.20.1
- [PULL 06/41] hw/timer/sh_timer: Switch to transaction-based ptimer API, (continued)
- [PULL 06/41] hw/timer/sh_timer: Switch to transaction-based ptimer API, Peter Maydell, 2019/10/22
- [PULL 07/41] hw/timer/lm32_timer: Switch to transaction-based ptimer API, Peter Maydell, 2019/10/22
- [PULL 08/41] hw/timer/altera_timer.c: Switch to transaction-based ptimer API, Peter Maydell, 2019/10/22
- [PULL 09/41] hw/watchdog/etraxfs_timer.c: Switch to transaction-based ptimer API, Peter Maydell, 2019/10/22
- [PULL 10/41] hw/m68k/mcf5208.c: Switch to transaction-based ptimer API, Peter Maydell, 2019/10/22
- [PULL 11/41] target/arm: Split out rebuild_hflags_common, Peter Maydell, 2019/10/22
- [PULL 13/41] target/arm: Split out rebuild_hflags_common_32, Peter Maydell, 2019/10/22
- [PULL 12/41] target/arm: Split out rebuild_hflags_a64, Peter Maydell, 2019/10/22
- [PULL 14/41] target/arm: Split arm_cpu_data_is_big_endian, Peter Maydell, 2019/10/22
- [PULL 16/41] target/arm: Reduce tests vs M-profile in cpu_get_tb_cpu_state, Peter Maydell, 2019/10/22
- [PULL 15/41] target/arm: Split out rebuild_hflags_m32,
Peter Maydell <=
- [PULL 17/41] target/arm: Split out rebuild_hflags_a32, Peter Maydell, 2019/10/22
- [PULL 18/41] target/arm: Split out rebuild_hflags_aprofile, Peter Maydell, 2019/10/22
- [PULL 19/41] target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get_tb_cpu_state, Peter Maydell, 2019/10/22
- [PULL 20/41] target/arm: Simplify set of PSTATE_SS in cpu_get_tb_cpu_state, Peter Maydell, 2019/10/22
- [PULL 22/41] target/arm: Add arm_rebuild_hflags, Peter Maydell, 2019/10/22
- [PULL 21/41] target/arm: Hoist computation of TBFLAG_A32.VFPEN, Peter Maydell, 2019/10/22
- [PULL 23/41] target/arm: Split out arm_mmu_idx_el, Peter Maydell, 2019/10/22
- [PULL 25/41] target/arm: Add HELPER(rebuild_hflags_{a32, a64, m32}), Peter Maydell, 2019/10/22
- [PULL 24/41] target/arm: Hoist store to cs_base in cpu_get_tb_cpu_state, Peter Maydell, 2019/10/22
- [PULL 26/41] target/arm: Rebuild hflags at EL changes, Peter Maydell, 2019/10/22