Re: [PATCH] target/arm: Fix ISR_EL1 tracking when executing at EL2

[Philippe Mathieu-Daudé]

On 11/22/19 3:16 PM, Peter Maydell wrote:
> On Fri, 22 Nov 2019 at 13:59, Marc Zyngier <address@hidden> wrote:
> > The ARMv8 ARM states when executing at EL2, EL3 or Secure EL1,
> > ISR_EL1 shows the pending status of the physical IRQ, FIQ, or
> > SError interrupts.
> >
> > Unfortunately, QEMU's implementation only considers the HCR_EL2
> > bits, and ignores the current exception level. This means a hypervisor
> > trying to look at its own interrupt state actually sees the guest
> > state, which is unexpected and breaks KVM as of Linux 5.3.
> >
> > Instead, check for the running EL and return the physical bits
> > if not running in a virtualized context.
> >
> > Fixes: 636540e9c40b
> > Reported-by: Quentin Perret <address@hidden>
> > Signed-off-by: Marc Zyngier <address@hidden>
>
> Congratulations on your first QEMU patch :-)

:))