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Re: [PATCH 3/3] target/arm: Handle trapping to EL2 of AArch32 VMRS instr
From: |
Peter Maydell |
Subject: |
Re: [PATCH 3/3] target/arm: Handle trapping to EL2 of AArch32 VMRS instructions |
Date: |
Fri, 29 Nov 2019 09:51:40 +0000 |
On Fri, 29 Nov 2019 at 09:45, Edgar E. Iglesias
<address@hidden> wrote:
> IIRC, the current EL was always known at translation time but I've
> not been tracking recent changes.
Yes, it's known at translate time, in dc->current_el.
(The code is structured to make it difficult to accidentally
use info that's not known at translate-time: most translate.c
code only has access to the DisasContext struct, and that
struct only has info that is safe to use.)
We need to know the EL at translate time anyway because we
need to generate the right kind of guest load/store, where
the code generated is different for different ELs (they
get looked up in different TLBs because the access
permissions can differ).
thanks
-- PMM
[PATCH 2/3] target/arm: Honor HCR_EL2.TID1 trapping requirements, Marc Zyngier, 2019/11/28
[PATCH 1/3] target/arm: Honor HCR_EL2.TID2 trapping requirements, Marc Zyngier, 2019/11/28
Re: [PATCH 0/3] target/arm: More HCR_EL2.TIDx fixes, Peter Maydell, 2019/11/28