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Re: [PATCH 01/11] cputlb: Handle NB_MMU_MODES > TARGET_PAGE_BITS_MIN
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From: |
Peter Maydell |
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Subject: |
Re: [PATCH 01/11] cputlb: Handle NB_MMU_MODES > TARGET_PAGE_BITS_MIN |
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Date: |
Fri, 6 Dec 2019 18:56:37 +0000 |
On Tue, 3 Dec 2019 at 22:53, Richard Henderson
<address@hidden> wrote:
>
> In target/arm we will shortly have "too many" mmu_idx.
> The current minimum barrier is caused by the way in which
> tlb_flush_page_by_mmuidx is coded.
>
> We can remove this limitation by allocating memory for
> consumption by the worker. Let us assume that this is
> the unlikely case, as will be the case for the majority
> of targets which have so far satisfied the BUILD_BUG_ON,
> and only allocate memory when necessary.
>
> Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
thanks
-- PMM
- [PATCH 00/11] target/arm: Implement ARMv8.1-PAN + ARMv8.2-ATS1E1, Richard Henderson, 2019/12/03
- [PATCH 02/11] target/arm: Add arm_mmu_idx_is_stage1, Richard Henderson, 2019/12/03
- [PATCH 01/11] cputlb: Handle NB_MMU_MODES > TARGET_PAGE_BITS_MIN, Richard Henderson, 2019/12/03
- Re: [PATCH 01/11] cputlb: Handle NB_MMU_MODES > TARGET_PAGE_BITS_MIN,
Peter Maydell <=
- [PATCH 04/11] target/arm: Reduce CPSR_RESERVED, Richard Henderson, 2019/12/03
- [PATCH 06/11] target/arm: Update MSR access for PAN, Richard Henderson, 2019/12/03
- [PATCH 07/11] target/arm: Update arm_mmu_idx_el for PAN, Richard Henderson, 2019/12/03
- [PATCH 05/11] target/arm: Add isar_feature tests for PAN + ATS1E1, Richard Henderson, 2019/12/03
- [PATCH 03/11] target/arm: Add mmu_idx for EL1 and EL2 w/ PAN enabled, Richard Henderson, 2019/12/03