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[PULL 00/34] target-arm queue
From: |
Peter Maydell |
Subject: |
[PULL 00/34] target-arm queue |
Date: |
Mon, 16 Dec 2019 11:08:30 +0000 |
First arm pullreq of 5.0!
The following changes since commit 084a398bf8aa7634738e6c6c0103236ee1b3b72f:
Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into
staging (2019-12-13 18:14:07 +0000)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20191216-1
for you to fetch changes up to f80741d107673f162e3b097fc76a1590036cc9d1:
target/arm: ensure we use current exception state after SCR update
(2019-12-16 10:52:58 +0000)
----------------------------------------------------------------
target-arm queue:
* Add support for Cortex-M7 CPU
* exynos4210_gic: Suppress gcc9 format-truncation warnings
* aspeed: Various minor bug fixes and improvements
* aspeed: Add support for the tacoma-bmc board
* Honour HCR_EL32.TID1 and .TID2 trapping requirements
* Handle trapping to EL2 of AArch32 VMRS instructions
* Handle AArch32 CP15 trapping via HSTR_EL2
* Add support for missing Jazelle system registers
* arm/arm-powerctl: set NSACR.{CP11, CP10} bits in arm_set_cpu_on
* Add support for DC CVAP & DC CVADP instructions
* Fix assertion when SCR.NS is changed in Secure-SVC &c
* enable SHPC native hot plug in arm ACPI
----------------------------------------------------------------
Alex Bennée (1):
target/arm: ensure we use current exception state after SCR update
Beata Michalska (4):
tcg: cputlb: Add probe_read
Memory: Enable writeback for given memory region
migration: ram: Switch to ram block writeback
target/arm: Add support for DC CVAP & DC CVADP ins
Christophe Lyon (1):
target/arm: Add support for cortex-m7 CPU
Cédric Le Goater (12):
aspeed/i2c: Add support for pool buffer transfers
aspeed/i2c: Check SRAM enablement on AST2500
aspeed: Add a DRAM memory region at the SoC level
aspeed/i2c: Add support for DMA transfers
aspeed/i2c: Add trace events
aspeed/smc: Restore default AHB window mapping at reset
aspeed/smc: Do not map disabled segment on the AST2600
aspeed/smc: Add AST2600 timings registers
aspeed: Remove AspeedBoardConfig array and use AspeedMachineClass
aspeed: Add support for the tacoma-bmc board
aspeed: Change the "scu" property definition
aspeed: Change the "nic" property definition
David Gibson (1):
exynos4210_gic: Suppress gcc9 format-truncation warnings
Heyi Guo (2):
hw/arm/acpi: simplify AML bit and/or statement
hw/arm/acpi: enable SHPC native hot plug
Joel Stanley (4):
aspeed/sdmc: Make ast2600 default 1G
aspeed/scu: Fix W1C behavior
watchdog/aspeed: Improve watchdog timeout message
watchdog/aspeed: Fix AST2600 frequency behaviour
Marc Zyngier (5):
target/arm: Honor HCR_EL2.TID2 trapping requirements
target/arm: Honor HCR_EL2.TID1 trapping requirements
target/arm: Handle trapping to EL2 of AArch32 VMRS instructions
target/arm: Handle AArch32 CP15 trapping via HSTR_EL2
target/arm: Add support for missing Jazelle system registers
Niek Linnenbank (1):
arm/arm-powerctl: set NSACR.{CP11, CP10} bits in arm_set_cpu_on()
PanNengyuan (1):
gpio: fix memory leak in aspeed_gpio_init()
Philippe Mathieu-Daudé (2):
hw/arm/sbsa-ref: Simplify by moving the gic in the machine state
hw/arm/virt: Simplify by moving the gic in the machine state
include/exec/exec-all.h | 6 +
include/exec/memory.h | 6 +
include/exec/ram_addr.h | 8 +
include/hw/arm/aspeed.h | 24 +--
include/hw/arm/aspeed_soc.h | 1 +
include/hw/arm/virt.h | 1 +
include/hw/i2c/aspeed_i2c.h | 16 ++
include/hw/ssi/aspeed_smc.h | 1 +
include/hw/watchdog/wdt_aspeed.h | 1 +
include/qemu/cutils.h | 1 +
target/arm/cpu.h | 20 +-
target/arm/helper.h | 3 +
target/arm/translate.h | 2 +
exec.c | 36 ++++
hw/arm/aspeed.c | 271 +++++++++++++----------
hw/arm/aspeed_ast2600.c | 25 ++-
hw/arm/aspeed_soc.c | 22 +-
hw/arm/sbsa-ref.c | 86 ++++----
hw/arm/virt-acpi-build.c | 21 +-
hw/arm/virt.c | 109 +++++-----
hw/gpio/aspeed_gpio.c | 1 +
hw/i2c/aspeed_i2c.c | 439 +++++++++++++++++++++++++++++++++++---
hw/intc/exynos4210_gic.c | 9 +-
hw/misc/aspeed_scu.c | 19 +-
hw/misc/aspeed_sdmc.c | 6 +-
hw/net/ftgmac100.c | 19 +-
hw/ssi/aspeed_smc.c | 63 ++++--
hw/timer/aspeed_timer.c | 17 +-
hw/watchdog/wdt_aspeed.c | 41 ++--
linux-user/elfload.c | 2 +
memory.c | 12 ++
migration/ram.c | 5 +-
target/arm/arm-powerctl.c | 3 +
target/arm/cpu.c | 33 +++
target/arm/cpu64.c | 1 +
target/arm/helper.c | 170 ++++++++++++++-
target/arm/op_helper.c | 22 ++
target/arm/translate-vfp.inc.c | 20 +-
target/arm/translate.c | 9 +-
target/arm/vfp_helper.c | 29 +++
util/cutils.c | 38 ++++
hw/i2c/trace-events | 9 +
tests/data/acpi/virt/DSDT | Bin 18470 -> 18462 bytes
tests/data/acpi/virt/DSDT.memhp | Bin 19807 -> 19799 bytes
tests/data/acpi/virt/DSDT.numamem | Bin 18470 -> 18462 bytes
45 files changed, 1273 insertions(+), 354 deletions(-)
- [PULL 00/34] target-arm queue,
Peter Maydell <=
- [PULL 01/34] target/arm: Add support for cortex-m7 CPU, Peter Maydell, 2019/12/16
- [PULL 05/34] aspeed: Add a DRAM memory region at the SoC level, Peter Maydell, 2019/12/16
- [PULL 02/34] exynos4210_gic: Suppress gcc9 format-truncation warnings, Peter Maydell, 2019/12/16
- [PULL 04/34] aspeed/i2c: Check SRAM enablement on AST2500, Peter Maydell, 2019/12/16
- [PULL 03/34] aspeed/i2c: Add support for pool buffer transfers, Peter Maydell, 2019/12/16
- [PULL 06/34] aspeed/i2c: Add support for DMA transfers, Peter Maydell, 2019/12/16
- [PULL 08/34] aspeed/sdmc: Make ast2600 default 1G, Peter Maydell, 2019/12/16
- [PULL 09/34] aspeed/scu: Fix W1C behavior, Peter Maydell, 2019/12/16
- [PULL 07/34] aspeed/i2c: Add trace events, Peter Maydell, 2019/12/16
- [PULL 12/34] aspeed/smc: Restore default AHB window mapping at reset, Peter Maydell, 2019/12/16